SA2400ABE NXP Semiconductors, SA2400ABE Datasheet - Page 19

no-image

SA2400ABE

Manufacturer Part Number
SA2400ABE
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SA2400ABE

Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Package Type
LQFP
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SA2400ABE
Manufacturer:
PHI
Quantity:
1 370
Part Number:
SA2400ABE
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
14.2 Description of READ cycle
1. (start) SEN is LOW or is changed to LOW, i.e., 3-wire interface is
2. (SCLK edge 1 through 7) 7 address bits are clocked in, LSB first.
The fully static CMOS design uses virtually no current when the bus is inactive. It can always capture new data even during power-down. The
data remains latched during power-down (sleep mode).
14.3 3-wire bus/logic control AC characteristics
Table 11. 3-wire bus/logic control AC characteristics
2002 Nov 04
SYMBOL
SYMBOL
Serial Bus Logic Level Requirements
V
V
Serial Programming Clock, SCLK
t
t
T
Enable Programming, SEN
T
Data Programming, SDATA
T
T
T
r
f
SDATA
cyc
on
setup
hold
dout
IH
IL
Single chip transceiver for 2.45 GHz ISM band
SCLK
enabled.
The bit values on SDATA are taken over with rising edges on
SCLK.
SEN
PARAMETER
PARAMETER
HIGH logic input voltage
LOW logic input voltage
Input rise time
Input fall time
Clock period
Delay to rising clock edge
Input data to clock set-up time
Input data to clock hold time
Output data to clock delay time
(falling edge)
A0
1
T
on
A1
2
A2
3
T
Figure 10. READ cycle timing diagram of the 3-wire bus
setup
T
A3
hold
4
A4
5
TEST CONDITIONS
TEST CONDITIONS
A5
6
T
cyc
19
A6
7
3. (SCLK edge 8) The READ/WRITE bit is clocked in with the rising
4. (SCLK edges 9 through 32) 24 data bits are clocked out, LSB
edge of SCLK. ‘1’ = WRITE, ‘0’ = READ.
first. The bits will be available on the SDATA pin with the falling
edges of SCLK (so bits can be accepted by the baseband IC
with the following rising edge).
R/W
8
D0
9
T
Min
0.5 V
–0.3
22
10
10
10
dout
t
r
DD
D1
10
Typ
10
10
100
D2
LIMITS
t
f
11
Max
V
0.2 V
40
40
10
DD
D23
SA2400A
+ 0.3
32
DD
Product data
UNITS
UNITS
V
V
ns
ns
ns
ns
ns
ns
ns
SR02289
1

Related parts for SA2400ABE