WGCE5037 882557 Intel, WGCE5037 882557 Datasheet
WGCE5037 882557
Specifications of WGCE5037 882557
Related parts for WGCE5037 882557
WGCE5037 882557 Summary of contents
Page 1
... Intel Corporation Intel and the Intel logo are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. WGCE5037 882557 WGCE5037 S L9FV 882558 28 Pin QFN* Tape & Reel Description The CE5037 is a fully integrated direct conversion tuner for digital satellite receiver systems ...
Page 2
... General Control Register 3.0 Applications Information 3.1 General Design Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 DVB-S2 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 Baseband Filter Bandwidth Calculation 4.0 Pin Descriptions 5.0 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.0 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8.0 Typical Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 CE5037 Table of Contents 2 Intel Corporation Data Sheet ...
Page 3
... Figure 2 - Pin Diagram Description Pin # Table 1 - Pin Names 3 Intel Corporation RFAGC N/C RFIN N/C RFIN N/C VccRF1 Ground - Package Paddle Name Description QOUT Q Channel baseband output QOUT Q Channel baseband output VccBB Baseband Supply IOUT I Channel baseband output IOUT I Channel baseband output ...
Page 4
... Figure 3 - Detailed Block Diagram CE5037 BANDWIDTH BF ADJUST FILTER FILTER 90 deg 0 deg PHASE SPLITTER LOCK DETECT 15 BIT Fpd CHARGE PROGRAMMABLE PUMP DIVIDER Fcomp I2C BUS INTERFACE REFERENCE DIVIDER 4 Intel Corporation Data Sheet VccBB QOUT QOUT DC CORRECTION DC CORRECTION IOUT IOUT VccCP PUMP PORT P0 INTERFACE ...
Page 5
... This equation makes no allowance for LNB tuning offset at low symbol rates < 10 MS/s. CE5037 order Chebychev and provide excellent matching in both amplitude and phase − FilterBand width fc 5 Intel Corporation × SymbolRate . 1 35 × Data Sheet ...
Page 6
... This frequency is derived either from the on-board crystal controlled oscillator or from an external reference source. In both cases the reference frequency is divided down to the comparison frequency by the reference divider, which is programmable into ratios. CE5037 6 Intel Corporation Data Sheet ...
Page 7
... Register A Register Address Data Data N N N+1 Register A Start Device R Address Address N Register A Start Device R Address Address N 7 Intel Corporation 2 C bus format. The device can Register A Stop ... Data N+M A Register N Stop Data N A Register A Register Data ... Data N N+M Data Sheet N ...
Page 8
... Local Oscillator F General X* denotes a read only test bit CE5037 Function PLF BF7 BF6 BF5 BF4 BR4 BLF* BG3 BG2 BG1 FLF CLR P0 0 Table 2 - Register Map 8 Intel Corporation Data Sheet LEN RFG BF3 BF2 BF1 BF0 BR3 BR2 BR1 BR0 BG0 ...
Page 9
... Register 0 and 1 must be therefore be Default Type 0 R/W Test modes 0 R/W Charge pump current 0 R/W Reference divider ratio Table 5 - Register 2 . C[0] Typ 0 400 1 550 0 750 1 1000 Table 6 - Charge Pump Currents 9 Intel Corporation Data Sheet Description Description Description Units ...
Page 10
... Table 7 - PLL Reference Divider Ratios Default Type 0X40 R/W Test Modes Table 8 - Register 3 Default Type - R Test Modes 11011 R/W Test Modes 1 R/W Bypass Enable 0 R/W RF Gain Adjust Table 9 - Register 4 10 Intel Corporation Division R0 Ratio 128 1 256 160 1 320 Description Description Data Sheet ...
Page 11
... Base Band Reference Division Ratio Table 11 - Register 6 ( Filter bandwidth (MHz Crystal Frequency Default Type - R Base Band Lock Flag 0111 R/W Base Band Gain Select 000 R/W Test Modes Table 12 - Register 7 11 Intel Corporation Description Description * 5.088 * BR[4 : 0]) − 1 (MHz) Description Data Sheet ...
Page 12
... Local Oscillator Registers There are seven registers that control the Local Oscillator: These are used primarily for test and evaluation by Intel Corporation. Although VCO’s can be manually programmed, the user is recommended to use the default automatic settings as these provide optimum performance. ...
Page 13
... R/W Test Modes Table 18 - Register C Default Type - R Test Modes (read only) 0X10 R/W Test Modes Table 19 - Register D Default Type - R Test Modes (read only) 0X30 R/W Test Modes Table 20 - Register E 13 Intel Corporation Data Sheet Description Description Description Description Description Description ...
Page 14
... Clear and reset logic 0 R/W Port 0 control 0 R/W Test Mode - R Test Modes (Read only) Table 21 - Register interface will remain active and can still be used to enable the 14 Intel Corporation Data Sheet Description 2 C interface does not operate Interface and the current write ...
Page 15
... CVd 17 d CVd 44 d CVd 50 d CVd 59 d CVd 22 d CVd 32 d CVd EEP SL SDA XTALCAP 24 XTAL 25 VccDIG 26 VccCP 27 PUMP 28 15 Intel Corporation Gnd 23 Gnd 26 Gnd 28 Gnd 31 Gnd 33 Gnd 6 Gnd 8 Gnd 13 Gnd 18 Gnd 21 Gnd 40 Gnd 45 Gnd 51 Gnd 54 Gnd 58 AGC INB cFE ...
Page 16
... General Design Guidelines Figure 4 shows a typical application using a CE6313 as a demodulator. This is available as a reference design (CE9542) from Intel Corporation. The design uses a standard two layer board. All components are mounted on the upper surface with the lower surface as a ground plane. The RF input requires a coupling capacitor and series inductor for optimum matching. ...
Page 17
... Equation BR Equation 2 − 1 fxtal fxtal is approximately 1 MHz MHz 17 Intel Corporation Notes Filter bandwidth = 26.5 MHz PLL Loop Bandwidth = 10kHz Phase noise integrated over 1kHz to 10 MHz Data Sheet ...
Page 18
... VccVCO +3.3 V voltage supply for VCO's. 4 VccLO +3.3 V voltage supply for LO circuits. 5 LOTEST For Intel testing only. Must not connect. 6 RFBYPASS RF bypass output. AC couple. Matching circuitry as shown in applications diagram. Do not connect in applications where RF bypass is not required. 7 VccRF2 +3 ...
Page 19
... Logic '0' normal mode. Logic '1' - analog sections are powered down including crystal oscillator SCL I C serial clock input CE5037 Description Same as pin 15,16 19 Intel Corporation Data Sheet Schematic Vcc Vref 10k RFAGC 30k Vcc Output SLEEP CMOS Digital input SCL CMOS Digital input ...
Page 20
... MHz) 26 VccDIG +3.3 V voltage supply for digital logic. 27 VccCP +3.3 V voltage supply for varactor tuning. 28 PUMP Charge pump output. CE5037 Description 20 Intel Corporation Data Sheet Schematic SDA CMOS Digital input/output P0 CMOS Digital output Vcc XTAL 100 XCAP 0.2 mA Vcc PUMP ...
Page 21
... Units 3.15 3.45 V -10 +85 °C 950 2150 MHz 4.7 kΩ Intel Corporation Data Sheet Notes The voltage on any pin must not exceed 3.6 V Package ground paddle soldered to ground Mil std 883B method 3015 cat1 Mil std 883B method 3015 cat1 Notes ...
Page 22
... Intel Corporation Conditions Outputs unloaded. Max Filter bandwidth mA RF Bypass disabled mA RF Bypass enabled input. Crystal oscillator remains operational Ω with external matching. dB Bypass enabled or disabled dB At max gain dB At -70 dBm operating level dB At -60 dBm operating level ...
Page 23
... Intel Corporation Data Sheet Conditions Note 5, all gain settings Note 6 1 MHz Baseband Signal = 1.5 MHz Baseband Signal = 18 MHz 1 MHz synthesizer phase detector comparison frequency 500 - 2000 kHz 950 - 2150 MHz 30 - 950 MHz Worst case channels GHz. Note 7 10 kHz offset ...
Page 24
... 0.4 µA -10 10 0.4 V 100 kHz 24 Intel Corporation Data Sheet Conditions 950-2150 MHz. Bypass enabled or disabled 950-2150 MHz. Bypass enabled or disabled Vpin = 0.5 to 1.3 V Vpin = 0 MHz crystal Note 10 Note 10 ac coupled sinewave ac coupled sinewave 10 MHz crystal SSB within PLL loop bandwidth Input = Vee to VccDIG +0 ...
Page 25
... Note 10: Crystal specifications vary considerably and significantly effect the choice of external oscillator capacitor values. Each application may require separate consideration for optimum performance. CE5037 Min. Typ. Max. Units 3 mA µA 10 1.9 3.6 Vee 1.0 µ Intel Corporation Conditions Vcc V V Vin = Vee to VccDIG Data Sheet ...
Page 26
... Typical Performance Data CE5037 -10 0 0.5 1 1.5 2 AGC Voltage Figure 5 - Gain v. RFAGC at 25° -10 0 0.5 1 1.5 2 AGC voltage Figure 6 - Gain v RFAGC v. Temperature 26 Intel Corporation LO 950MHz LO 1550MHz LO 2150MHz 2.5 3 -15°C +25°C +90°C 2.5 3 Data Sheet ...
Page 27
... CE5037 20 3.1Vcc 10 3.3Vcc 0 3.5Vcc -10 -20 -30 -40 - Gain Setting dB Figure 7 - IIP3 v Gain at 25° -10 3.1Vcc -20 3.3Vcc 3.5Vcc - Gain Setting dB Figure 8 - IIP2 v Gain at 25°C 27 Intel Corporation Data Sheet ...
Page 28
... CE5037 30 20 RFG set to -10dB 10 0 -10 -20 -30 - Gain Setting dB Figure 9 - IIP3 v Gain at 25°C (RFG = 1) 40.0 RFG set to -10dB 30.0 20.0 10.0 0.0 -10.0 -20 Gain Setting dB Figure 10 - IIP2 v Gain at 25°C (RFG = 1 28 Intel Corporation Data Sheet ...
Page 29
... CE5037 RFin = -70dBm 6 950 1150 1350 1550 1750 Frequency (MHz) Figure 11 - Noise Figure v Freq at 25° 1550MHz -80 -70 -60 -50 -40 RFin (dBm) Figure 12 - Noise Figure v RFin v Temperature 29 Intel Corporation 1950 2150 -15°C +25°C +90°C Spec -30 -20 -10 Data Sheet ...
Page 30
... Frequency offset (Hz) Figure Phase Noise at 25°C -80.0 -85.0 -90.0 -95.0 -100.0 -105.0 -110.0 -115.0 -120.0 1000 10000 100000 Frequency offset (Hz) Figure Phase Noise v Temperature 30 Intel Corporation Data Sheet 10000000 -15degC +90degC 1000000 ...
Page 31
... Frequency (MHz) Figure Bypass Gain v Temperature 26.5MHz filter response 10 0 -10 -20 -30 -40 -50 -60 -70 -80 - Baseband frequency (MHz) Figure 16 - Baseband Filter Response 26.5 MHz 31 Intel Corporation 1750 1950 2150 +90°C +25°C -15°C 80 120 Data Sheet ...