SPD6729QCE Intel, SPD6729QCE Datasheet - Page 16

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SPD6729QCE

Manufacturer Part Number
SPD6729QCE
Description
PCI To PC Card (PCMCIA) Controller 208-Pin MQFP
Manufacturer
Intel
Datasheet

Specifications of SPD6729QCE

Package
208MQFP
Operating Temperature
0 to 70 °C

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PD6729 — PCI-to-PC Card (PCMCIA) Controller
16
Pin Name
DEVSEL#
EXT_CLK
Table 1.
PCI_CLK
RI_OUT*
TRDY#
STOP#
PERR#
SERR#
IRQ15/
IRQ14/
IDSEL
RST#
PAR
PCI Bus Interface Pins (Sheet 2 of 3)
Target Ready: This output indicates the PD6729’s
ability to complete the current data phase of the
transaction. TRDY# is used in conjunction with
IRDY#.
Stop: This output indicates the current target is
requesting the master to stop the current transaction.
Initialization Device Select: This input is used as a
chip select during configuration read and write
transactions. This is a point-to-point signal. The
PD6729 must be connected to its own unique IDSEL
line (from the PCI bus arbiter or one of the high-order
AD bus pins).
Device Select: The PD6729 drives this output active
(low) when it has decoded the PCI address as one
that it is programmed to support, thereby acting as
the target for the current PCI cycle.
Parity Error: The PD6729 drives this output active
(low) if it detects a data parity error during a write
phase.
System Error: This output is pulsed by the PD6729
to indicate an address parity error.
Parity: This pin is sampled the clock cycle after
completion of each corresponding address or write
data phase. For read operations this pin is driven
from the cycle after TRDY# is asserted until the cycle
after completion of each data phase. It ensures even
parity across AD[31:0] and C/BE[3:0]#.
PCI Clock: This input provides timing for all
transactions on the PCI bus to and from the PD6729.
All PCI bus interface signals described in this table
(Table
INTD#, are sampled on the rising edge of PCI_CLK;
and all PD6729 PCI bus interface timing parameters
are defined with respect to this edge. This input can
be operated at frequencies from 0 to 33 MHz.
Device Reset: This input is used to initialize all
registers and internal logic to their reset states and
place most PD6729 pins in a high-impedance state.
Interrupt Request 15 / Ring Indicate Out: This
output can be used either as an interrupt output
(usually the system’s IRQ15 interrupt line), or if Misc
Control 2 register bit 7 is a ‘1’, as a ring indicate
output from a socket’s BVD1/-STSCHG/-RI input.
Interrupt Request 14 / External Clock: This pin can
be used either as an interrupt output (usually the
system’s IRQ14 interrupt line), or if Misc Control 2
register bit 0 is a ‘1’, as an alternate external clock
input that will provide the internal clock to the PD6729
for PCMCIA cycle timing when the PCI bus is not
active.
1), except RST#, INTA#, INTB#, INTC#, and
Description
Pin Number
207
30
32
15
31
33
34
35
63
62
1
Qty.
1
1
1
1
1
1
1
1
1
1
1
OD
TO
TO
TO
TO
TO
I/O
I/O
I/O
I
I
I
Pwr.
4
4
4
4
4
4
4
4
Datasheet
Drive
Spec.
Spec.
Spec.
Spec.
Spec.
Spec.
2 mA
2 mA
PCI
PCI
PCI
PCI
PCI
PCI

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