LE9500ABJC Zarlink, LE9500ABJC Datasheet - Page 18

• Manufacturer Part Number: LE9500ABJC
• Description: SLIC 1-CH 52dB 40mA 3.3V 28-Pin PLCC Tube
• Manufacturer: Zarlink

Specifications of LE9500ABJC

• Package: 28PLCC
• Number Of Channels Per Chip: 1
• Polarity Reversal: Yes
• Longitudinal Balanced: 52(Min) dB
• Loop Current: 40(Typ) mA
• Minimum Operating Supply Voltage: 3.13 V
• Typical Operating Supply Voltage: 3.3 V
• Typical Supply Current: 4.7 mA

Sine Wave Input Signal and Sine Wave Power Ring Signal Output
The low-voltage sine wave input is applied differentially or single ended to the Le9500 device at pins RING
During the ring state, the signals at pins RING
gain from RING
When the device enters the Ring state, the clamp circuit is disabled, allowing the voltage magnitude of the power ring signal to
be maximized. Additionally, in the Ring state, the loop current limit is increased and is not limited by DC loop current limit.
The magnitude of the power ring voltage will be a function of the gain of the ring amplifier, the high-voltage battery, and the input
signal level at RING
the magnitude of the power ring voltage at tip and ring will increase linearly, until the tip and ring drive amplifiers begin to saturate.
Once the tip and ring amplifiers reach saturation, further increases of the input signal will cause clipping distortion of the power
ring signal at tip and ring. The ring signal will appear balanced on tip and ring. That is, the power ring signal is applied to both tip
and ring, with the signal on tip 180-degree out of phase from the signal on ring.
The point at which clipping of the power ring signal begins at tip and ring is a function of the battery voltage, the input capacitor
at RING
on at RING
at RING
Power Ringing with Le9500D
For operation of the Le9500D device with a high magnitude on V
following areas at system level.
Ringing Cadence
Scan or On Hook transmission state must be used during the silent period of ringing. Do not use Active state.
V
V
when the SLIC device is not in the Ringing mode. The amplitude of V
or any other non-ringing mode of operation.
Pre-Trip Immunity
The Le9500D device pre-trip immunity is specified as 2
pre trip load will generate excessive power. Depending on system and ambient conditions, ringing into a load heavier than 2
could force the device into thermal shutdown. Under these conditions, as the device goes into and out of thermal shutdown a
glitch will appear on NSTAT. Proper operation may require the system to filter out these glitches.
Robust Ring Trip Indication
Upon ring trip, there will be large current going through the SLIC device which may cause the SLIC to go into thermal shutdown.
Upon thermal shutdown, NSTAT remains Low, which is still consistent with the Ring Trip state. During thermal shutdown, the net
voltage on RTFLT will go up because the Tip Ring amplifiers are off. When the voltage on RTFLT passes a certain limit (ring trip
threshold), until a SLIC state change, NSTAT will toggle between the thermal shutdown inducted low indication and the RTFLT
voltage high indication.
There are several ways to help remedy this situation. Limit the current on V
ground upon off hook, add a 100-Ω power resistor in the V
threshold.
For more details, please contact Zarlink field/customer applications.
BAT1
BAT1
may be more negative than -100 V only during the actual power ringing. The amplitude of V
supply
INP/N
INP/N
INP/N
, and the input signal at RING
.
INP/N
. Via the state table, the ring signal will be removed from tip and ring, even if the low voltage input is still present
INP/N
to tip and ring is specified in the device specifications.
. The input range of the signal at RING
INP/N
INP
and V
and RING
Zarlink Semiconductor Inc.
CC
µ
. During non-ringing states, the sinusoidal ringing waveform may be left
F. With battery voltages more negative than -100 V, ringing into a heavy
INN
BAT1
are amplified and presented to the subscriber loop. The differential
18
INP/N
, or add a 2-M
BAT1
BAT1
is 0 V to Vcc. As the input voltage at RING
greater than -100 V, special attention must be given to the
may not exceed 100 V during the silent period of ringing
BAT1
Ω
resistor from RTFLT to ground to lower ring trip
supply such that V
BAT1
BAT1
should not exceed 100 V
will move up towards
INP/N
INP
and RING
is increased,
INN
µ
F
.