LM2651MTCX-ADJ National Semiconductor, LM2651MTCX-ADJ Datasheet - Page 10

• Manufacturer Part Number: LM2651MTCX-ADJ
• Description: Conv DC-DC Single Step Down 4V to 14V 16-Pin TSSOP T/R
• Manufacturer: National Semiconductor
• Type: Step Downr

Specifications of LM2651MTCX-ADJ

• Package: 16TSSOP
• Number Of Outputs: 1
• Minimum Input Voltage: 4 V
• Maximum Input Voltage: 14 V
• Switching Frequency: 280 to 330 KHz
• Operating Supply Voltage: 4 to 14 V
• Maximum Output Current: 1.5 A
• Output Type: Adjustable
• Output Voltage: 1.24 to 13 V
• Switching Regulator: Yes
• Efficiency: 97 %
• Operating Temperature: -40 to 125 °C

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Design Procedure
EXTERNAL SCHOTTKY DIODE
A Schottky diode D
body diode of the low-side MOSFET from conducting during
the deadtime in PWM operation and hysteretic mode when
both MOSFETs are off. If the body diode turns on, there is
extra power dissipation in the body diode because of the
reverse-recovery current and higher forward voltage; the
high-side MOSFET also has more switching loss since the
negative diode reverse-recovery current appears as the
high-side MOSFET turn-on current in addition to the load
current. These losses degrade the efficiency by 1-2%. The
improved efficiency and noise immunity with the Schottky
diode become more obvious with increasing input voltage
and load current.
The breakdown voltage rating of D
higher than the maximum input voltage. Since D
for a short period of time, the average current rating for D
only requires being higher than 30% of the maximum output
current. It is important to place D
source of the low-side MOSFET, extra parasitic inductance
in the parallel loop will slow the turn-on of D
current through the body diode of the low-side MOSFET.
When an undervoltage situation occurs, the output voltage
can be pulled below ground as the inductor current is re-
1
is recommended to prevent the intrinsic
1
(Continued)
very close to the drain and
1
is preferred to be 25%
Schematic for the Typical Board Layout
1
and direct the
1
is only on
1
10
versed through the synchronous FET. For applications which
need to be protected from a negative voltage, a clamping
diode D2 is recommended. When used, D2 should be con-
nected cathode to V
for a minimum of 2A is recommended.
PCB Layout Considerations
Layout is critical to reduce noises and ensure specified
performance. The important guidelines are listed as follows:
1. Minimize the parasitic inductance in the loop of input
2. Minimize the trace from the center of the output resistor
3. If the Schottky diode D
capacitors and the internal MOSFETs by connecting the
input capacitors to V
wide traces. This is important because the rapidly
switching current, together with wiring inductance can
generate large voltage spikes that may result in noise
problems.
divider to the FB pin and keep it away from noise
sources to avoid noise pick up. For applications requir-
ing tight regulation at the output, a dedicated sense
trace (separated from the power trace) is recommended
to connect the top of the resistor divider to the output.
connecting D
1
to SW and PGND pins.
OUT
and anode to ground. A diode rated
IN
and PGND pins with short and
1
is used, minimize the traces
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