LM2619ATLX National Semiconductor, LM2619ATLX Datasheet - Page 13

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LM2619ATLX

Manufacturer Part Number
LM2619ATLX
Description
Conv DC-DC Single Step Down 2.8V to 5.5V 10-Pin uSMD T/R
Manufacturer
National Semiconductor
Type
Step Downr
Datasheet

Specifications of LM2619ATLX

Package
10uSMD
Number Of Outputs
1
Minimum Input Voltage
2.8 V
Maximum Input Voltage
5.5 V
Switching Frequency
500 to 1000 KHz
Operating Supply Voltage
2.8 to 5.5 V
Maximum Output Current
0.5 A
Output Type
Adjustable
Output Voltage
1.5 to 3.6 V
Switching Regulator
Yes
Efficiency
96(Typ) %
Operating Temperature
-25 to 125 °C

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Application Information
The input filter capacitor supplies current to the PFET switch
of the LM2619 in the first part of each cycle and reduces
voltage ripple imposed on the input power source. The out-
put filter capacitor smoothes out current flow from the induc-
tor to the load, helps maintain a steady output voltage during
MICRO SMD PACKAGE ASSEMBLY AND USE
Use of the micro SMD package requires specialized board
layout, precision mounting and careful reflow techniques, as
detailed in National Semiconductor Application Note AN-
1112. Refer to the section Surface Mount Technology (SMT)
Assembly Considerations. For best results in assembly,
alignment ordinals on the PC board should be used to
facilitate placement of the device.
The pad style used with micro SMD package must be the
NSMD (non-solder mask defined) type. This means that the
solder-mask opening is larger than the pad size. This pre-
vents a lip that otherwise forms if the solder-mask and pad
overlap, from holding the device off the surface of the board
and interfering with mounting. See Application Note AN-1112
for specific instructions how to do this.
The 10-Bump package used for the LM2619 has 300 micron
solder balls and requires 10.82mil pads for mounting on the
circuit board. The trace to each pad should enter the pad
with a 90˚ entry angle to prevent debris from being caught in
deep corners. Initially, the trace to each pad should be
6–7mil wide, for a section approximately 6mil long, as a
thermal relief. Then each trace should neck up or down to its
optimal width. The important criterion is symmetry. This en-
sures the solder bumps on the LM2619 reflow evenly and
that the device solders level to the board. In particular,
special attention must be paid to the pads for bumps D3–B3.
Because PGND and PVIN are typically connected to large
copper planes, inadequate thermal reliefs can result in late
or inadequate reflow of these bumps.
The micro SMD package is optimized for the smallest pos-
sible size in applications with red or infrared opaque cases.
Because the micro SMD package lacks the plastic encapsu-
lation characteristic of larger devices, it is vulnerable to light.
Backside metalization and/or epoxy coating, along with front-
side shading by the printed circuit board, reduce this sensi-
tivity.
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter
design. Poor board layout can disrupt the performance of a
DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces.
These can send erroneous signals to the DC-DC converter
IC, resulting in poor regulation or instability. Poor layout can
also result in reflow problems leading to poor solder joints
between the micro SMD package and board pads. Poor
solder joints can result in erratic or degraded performance.
C1, C2 (Input or Output Filter Capacitor)
C2012X5ROJ106M
JMK212BJ106MG
ECJ3YB0J106K
JMK325BJ226MM
C3225X5RIA226M
Model
TABLE 2. Suggested Capacitors and Their Suppliers
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Type
(Continued)
TDK
Taiyo-Yuden
Panasonic
Taiyo-Yuden
TDK
Vendor
13
transient load changes and reduces output voltage ripple.
These capacitors must be selected with sufficient capaci-
tance and sufficiently low ESR to perform these functions.
The ESR, or equivalent series resistance, of the filter capaci-
tors is a major factor in voltage ripple.
Good layout for the LM2619 can be implemented by follow-
ing a few simple design rules.
1. Place the LM2619 on 10.82 mil (10.82/1000 in.) pads.
2. Place the LM2619, inductor and filter capacitors close
3. Arrange the components so that the switching current
4. Connect the ground pins of the LM2619, and filter ca-
5. Use wide traces between the power components and for
6. Route noise sensitive traces, such as the voltage feed-
As a thermal relief, connect to each pad with a 7 mil
wide, approximately 7 mil long traces, and then incre-
mentally increase each trace to its optimal width. The
important criterion is symmetry to ensure the solder
bumps on the LM2619 reflow evenly (see micro SMD
Package Assembly and Use).
together and make the traces short. The traces between
these components carry relatively high switching cur-
rents and act as antennas. Following this rule reduces
radiated noise. Place the capacitors and inductor within
0.2 in. (5 mm) of the LM2619.
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor,
through the LM2619 and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground, through the LM2619 by the inductor, to
the output filter capacitor and then back through ground,
forming a second current loop. Routing these loops so
the current curls in the same direction prevents mag-
netic field reversal between the two half-cycles and re-
duces radiated noise.
pacitors together using generous component-side cop-
per fill as a pseudo-ground plane. Then, connect this to
the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching
currents from circulating through the ground plane. It
also reduces ground bounce at the LM2619 by giving it
a low-impedance ground connection.
power connections to the DC-DC converter circuit. This
reduces voltage errors caused by resistive losses across
the traces.
back path, away from noisy traces between the power
components. The voltage feedback trace must remain
close to the LM2619 circuit and should be routed directly
from V
opposite to noise components. This reduces EMI radi-
ated onto the DC-DC converter’s own voltage feedback
trace.
OUT
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at the output capacitor and should be routed
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