UDN2987LW Allegro, UDN2987LW Datasheet - Page 4

• Manufacturer Part Number: UDN2987LW
• Description: LED DRVR 9V/12V/15V/18V/24V 20-Pin SOIC W
• Manufacturer: Allegro

Specifications of UDN2987LW

• Package: 20SOIC W
• Operating Supply Voltage: 7 to 35 V

2987
8-CHANNEL
SOURCE DRIVER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
and UDN2987LW have a maximum allowable output
current rating. The 500 mA rating does not imply that
operation at that value is permitted or even obtainable.
The channel output current trip point is specified as -370
mA, minimum; therefore, attempted operation at current
levels greater than -370 mA may cause a fault indication
and channel shutdown. The device is tested at a maxi-
mum of -350 mA and that is the recommended maximum
output current per driver. It provides protection for current
overloads or shorted loads up to 35 V.
When OE/R is low or allowed to float (internal pull-down),
all outputs are inhibited and the latches are reset. Note
that the RESET pulse duration (OE/R low) should be
at least 1 s. This will ensure safe operation under
attempted RESET conditions with a shorted load. The
latches are also reset during power up, regardless of the
state of the OE/R input.
the internal low-value sense resistor. This voltage is
compared to the voltage drop across a reference resistor
with a constant current. The two resistors are matched to
eliminate errors due to manufacturing tolerances or
temperature effects. Each channel includes a comparator
and its own latch. An over-current fault (V
will set the affected latch and shut down only that channel.
All other channels will continue to operate normally. The
latch includes a 1 s delay (t
triggering due to crossover currents generated when
switching inductive loads. For an abrupt short circuit, the
delay and output switching times will allow a brief,
permissable current in excess of the trip current before the
output driver is turned OFF.
if the chip temperature exceeds +165 C. At thermal
shutdown, all latches are reset. The outputs are disabled
until the chip cools down to about +150 C (thermal
hysteresis).
indicate any channel over-current condition or chip
thermal shutdown.
As with all power integrated circuits, the UDN2987A
All outputs are enabled by pulling the OE/R input high.
The load current causes a small voltage drop across
A common thermal shutdown disables all outputs
A common open-collector FAULT output is used to
d
) to prevent unwanted
SENSE
> V
REF
)