SI2109-D-FMR Silicon Laboratories Inc, SI2109-D-FMR Datasheet - Page 44

• Manufacturer Part Number: SI2109-D-FMR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2109-D-FMR

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Si2107/08/09/10
Register 03h. Transport Stream Control 2
44
Name
Bit
Bit
7:6
1:0
5
4
3
2
D7
TSSCR[1:0]
0
Reserved
TSPCS
Name
TSCD
TSDD
TSPG
D6
TSPCS
D5
Program as shown above.
Transport Stream Parallel Clock Smoother.
Smoothens TS_CLK to ~50% duty cycle.
0 = Smoothing disabled
1 = Smoothen clock to ~50% duty cycle (default)
Transport Stream Clock Delay.
Adds delay to TS_CLK to adjust clock-data timing relationship.
0 = Normal operation (default)
1 = Delay clock relative to data
Transport Stream Data Delay.
Adds delay to TS_DATA, TS_SYNC, TS_VAL, TS_ERR output to adjust
clock-data timing relationship.
0 = Normal operation (default)
1 = Delay data relative to clock
Transport Stream Parity Gate.
0 = Normal operation (default)
1 = Zero data lines during parity
Transport Stream Serial Clock Rate.
00 = 80–88.5 MHz (default)
01 = 76.8–82.8 MHz
10 = 54.8–59.2 MHz
11 = 34.9–37.7 MHz
The user should select a setting such that the corresponding minimum
clock output frequency is higher than the expected output bit rate.
TSCD
D4
Rev. 1.0
TSDD
D3
Function
TSPG
D2
D1
TSSCR[1:0]
D0