A1244LUA-I1-T Allegro Microsystems Inc, A1244LUA-I1-T Datasheet - Page 8

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A1244LUA-I1-T

Manufacturer Part Number
A1244LUA-I1-T
Description
IC HALL EFFECT LATCH SIP-3
Manufacturer
Allegro Microsystems Inc
Series
-r
Type
Bipolar Latchr
Datasheet

Specifications of A1244LUA-I1-T

Sensing Range
80G Trip, -80G Release
Voltage - Supply
3 V ~ 24 V
Current - Supply
6.9mA
Current - Output (max)
-
Output Type
Digital, Open Collector
Features
High Speed
Operating Temperature
-40°C ~ 150°C
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
620-1425
A1244
Figure 2. Typical application circuits
Chopper Stabilization Technique
When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed
across the Hall element. This voltage is disproportionally small
relative to the offset that can be produced at the output of the
Hall sensor IC. This makes it difficult to process the signal while
maintaining an accurate, reliable output over the specified oper-
ating temperature and voltage ranges. Chopper stabilization is
a unique approach used to minimize Hall offset on the chip. The
patented Allegro technique, namely Dynamic Quadrature Offset
Cancellation, removes key sources of the output drift induced by
thermal and mechanical stresses. This offset reduction technique
is based on a signal modulation-demodulation process. The
undesired offset signal is separated from the magnetic field-
induced signal in the frequency domain, through modulation.
The subsequent demodulation acts as a modulation process for
the offset, causing the magnetic field-induced signal to recover
V+
(A) Low side sensing
ECU
Figure 3. Chopper stabilization circuit (Dynamic Quadrature Offset Cancellation)
Hall Element
A1244
GND
VCC
R
SENSE
Regulator
C
0.01 μF
BYP
its original spectrum at base band, while the DC offset becomes
a high-frequency signal. The magnetic-sourced signal then can
pass through a low-pass filter, while the modulated DC offset is
suppressed. The chopper stabilization technique uses a 350 kHz
high frequency clock. For demodulation process, a sample and
hold technique is used, where the sampling is performed at twice
the chopper frequency. This high-frequency operation allows
a greater sampling rate, which results in higher accuracy and
faster signal-processing capability. This approach desensitizes
the chip to the effects of thermal and mechanical stresses, and
produces devices that have extremely stable quiescent Hall out-
put voltages and precise recoverability after temperature cycling.
This technique is made possible through the use of a BiCMOS
process, which allows the use of low-offset, low-noise amplifiers
in combination with high-density logic integration and sample-
and-hold circuits.
Chopper-Stabilized, Two Wire
Clock/Logic
Amp
V+
(B) High side sensing
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
Low-Pass
Filter
A1244
GND
VCC
Hall-Effect Latch
R
SENSE
C
0.01 μF
BYP
8

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