ATMEGA64-16AU SL383 Atmel, ATMEGA64-16AU SL383 Datasheet - Page 5

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ATMEGA64-16AU SL383

Manufacturer Part Number
ATMEGA64-16AU SL383
Description
MCU 8-Bit ATmega AVR RISC 64KB Flash 5V 64-Pin TQFP T/R
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA64-16AU SL383

Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Ram Size
4 KB
Program Memory Size
64 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
53
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
4
ATmega103
Compatibility Mode
Pin Descriptions
VCC
GND
Port A (PA7..PA0)
Port B (PB7..PB0)
2490QS–AVR–07/10
By programming the M103C Fuse, the ATmega64 will be compatible with the ATmega103
regards to RAM, I/O pins and Interrupt Vectors as described above. However, some new fea-
tures in ATmega64 are not available in this compatibility mode, these features are listed below:
Digital supply voltage.
Ground.
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATmega64 as listed on
73.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega64 as listed on
74.
One USART instead of two, asynchronous mode only. Only the eight least significant bits of
the Baud Rate Register is available.
One 16 bits Timer/Counter with two compare registers instead of two 16 bits Timer/Counters
with three compare registers.
Two-wire serial interface is not supported.
Port G serves alternate functions only (not a general I/O port).
Port F serves as digital input only in addition to analog input to the ADC.
Boot Loader capabilities is not supported.
It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
The External Memory Interface can not release any Address pins for general I/O, neither
configure different wait states to different External Memory Address sections.
Only EXTRF and PORF exist in the MCUCSR Register.
No timed sequence is required for Watchdog Timeout change.
Only low-level external interrupts can be used on four of the eight External Interrupt sources.
Port C is output only.
USART has no FIFO buffer, so Data OverRun comes earlier.
The user must have set unused I/O bits to 0 in ATmega103 programs.
ATmega64(L)
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