NBSG72AMN ON Semiconductor, NBSG72AMN Datasheet

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NBSG72AMN

Manufacturer Part Number
NBSG72AMN
Description
IC CROSSPOINT SWITCH 2X2 16QFN
Manufacturer
ON Semiconductor
Datasheet

Specifications of NBSG72AMN

Function
Crosspoint Switch
Circuit
1 x 2:2
Voltage Supply Source
Dual Supply
Voltage - Supply, Single/dual (±)
±2.38 V ~ 3.47 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
NBSG72AMNOS

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NBSG72A
2.5V/3.3V SiGe Differential
2 x 2 Crosspoint Switch
with Output Level Select
crosspoint switch with Output Level Select (OLS) capabilities. This is
a part of the GigaComm™ family of high performance Silicon
Germanium products. The device is housed in a low profile 3 X 3 mm
16−pin QFN package.
and accept NECL (Negative ECL), PECL (Positive ECL),
LVCMOS/LVTTL, CML, or LVDS. The OLS input is used to
program the peak−to−peak output amplitude between 0 mV and
800 mV in five discrete steps. The SELECT inputs are single−ended
and can be driven with either LVECL or LVCMOS/LVTTL
input levels.
Features
© Semiconductor Components Industries, LLC, 2010
November, 2010 − Rev. 7
The NBSG72A is a high−bandwidth fully differential 2 X 2
Differential inputs incorporate internal 50 W termination resistors
V
Operating Range: V
800 mV Peak−to−Peak Output)
(SELA, SELB)
Maximum Input Clock Frequency > 7 GHz Typical
Maximum Input Data Rate > 7 Gb/s Typical
200 ps Typical Propagation Delay (OLS = FLOAT)
55/45 ps Typical Rise/Fall Times (OLS = FLOAT)
Selectable Swing PECL Output with Operating Range:
Selectable Swing NECL Output with NECL Inputs with
Selectable Output Levels (0 mV, 200 mV, 400 mV, 600 mV or
50 W Internal Input Termination Resistors
Single−Ended LVECL or LVCMOS/LVTTL Select Inputs
Pb−Free Packages are Available
CC
= 2.375 V to 3.465 V with V
CC
= 0 V with V
EE
EE
= 0 V
= −2.375 V to −3.465 V
1
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
*For additional marking information, refer to
MN SUFFIX
CASE 485G
Application Note AND8002/D.
A
L
Y
W
G
(Note: Microdot may be in either location)
QFN−16
1
ORDERING INFORMATION
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
http://onsemi.com
Publication Order Number:
1
Ç Ç
Ç Ç
16
DIAGRAM*
MARKING
ALYWG
72A
SG
G
NBSG72A/D

Related parts for NBSG72AMN

NBSG72AMN Summary of contents

Page 1

NBSG72A 2.5V/3.3V SiGe Differential Crosspoint Switch with Output Level Select The NBSG72A is a high−bandwidth fully differential crosspoint switch with Output Level Select (OLS) capabilities. This is a part of the GigaComm™ family of high ...

Page 2

Table 1. PIN DESCRIPTION Pin No. Name I/O 1 VTD0 2 D0 LVDS, CML, ECL, LVTTL, LVCMOS Input 3 D0 LVDS, CML, ECL, LVTTL, LVCMOS Input 4 SELA LVECL, LVCMOS Input Á Á Á Á Á Á ...

Page 3

VTD0 VTD1 2 SELA SELB 75 kW OLS Figure 2. Logic/Block Diagram Table 3. OUTPUT LEVEL SELECT (OLS) OLS ...

Page 4

Table 5. ATTRIBUTES Internal Input Pulldown Resistor (SELA, SELB) ESD Protection Moisture Sensitivity (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 6. MAXIMUM RATINGS ...

Page 5

Table 7. DC CHARACTERISTICS, INPUT WITH PECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note 4) OL (OLS = V (OLS = V − 0.8 V, OLS ...

Page 6

Table 8. DC CHARACTERISTICS, INPUT WITH PECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note 9) OL (OLS = V (OLS = V − 0.8 V, OLS ...

Page 7

Table 9. DC CHARACTERISTICS, NECL INPUT WITH NECL OUTPUT Symbol Characteristic I Negative Power Supply Current EE V Output HIGH Voltage (Note 14 Output LOW Voltage (Note 14) OL −3.465 −3 (OLS ...

Page 8

Table 10. AC CHARACTERISTICS Symbol Characteristic V Output Voltage Amplitude OUTPP (Note 18) t Propagation Delay to Output Differential PLH D0, D1 → Q0, Q1 SELA, SELB → Q0 Propagation Delay to Output Differential PHL D0, D1 → ...

Page 9

OLS = V 800 700 OLS = V 600 500 *OLS = V 400 300 OLS = V 200 100 0 1 Figure 3. Output Voltage Amplitude (V Input Clock Frequency (f *When an output level of 400 mV ...

Page 10

D0 Q0 Non−Driven Signal Path Input Input Signal NBSG72A D1 Q1 SELA SELB Logic Logic Low Low Figure 6. Channel−to−Channel Crosstalk Isolation at Ambient Temperature ( and Q1 Signal Path Selected; SelA = Low, ...

Page 11

Figure 8. Eye Diagram at 3.2 Gb/s (V − 3.3 V, OLS = FLOAT @ 255C with input pattern Figure 9. Eye Diagram at 7 Gb/s/s (V − 3.3 V, OLS = ...

Page 12

V − 800 V − 700 CC 600 400 V − 250 V − 550 CC CC 200 − 400 V − 800 OLS (mV) Figure 11. OLS Operating Area D ...

Page 13

... ECLinPSt I/O SPiCE Modeling Kit − Metastability and the ECLinPS Family − Interfacing Between LVDS and ECL − The ECL Translator Guide http://onsemi.com 13 † Shipping 123 Units / Rail 123 Units / Rail 3000 / Tape & Reel 3000 / Tape & Reel Description NBSG72AMN Evaluation Board ...

Page 14

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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