SI3220-KQ Silicon Laboratories Inc, SI3220-KQ Datasheet - Page 55

IC SLIC/CODEC DUAL-CH 64TQFP

SI3220-KQ

Manufacturer Part Number
SI3220-KQ
Description
IC SLIC/CODEC DUAL-CH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3220-KQ

Package / Case
*
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
GCI, PCM, SPI
Number Of Circuits
2
Voltage - Supply
3.3V, 5V
Current - Supply
65mA
Power (watts)
941mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Includes
Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
Product
Telecom
Supply Voltage (min)
3.13 V
Supply Current
22 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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To enable automatic cadence for tone generator 1,
define the OSC1TA and OSC1TI registers and then set
the OSC1TAEN and OSC1TIEN bits. This enables each
of the timers to control the state of the Oscillator Enable
bit, OSC1EN. The 16-bit counter counts until the active
timer expires, when the 16-bit counter resets to zero
and begins counting until the inactive timer expires. The
cadence continues until the user clears the OSC1TA
and OSC1TIEN control bits. Setting the ZEROEN1 bit
implements the zero crossing detect feature. This
ensures that each oscillator pulse ends without a dc
component. The timing diagram in Figure 36 is an
Oscillator 1 Amplitude Coefficient
Oscillator 2 Amplitude Coefficient
Oscillator 1 Inactive Timer
Oscillator 2 Inactive Timer
Oscillator 1 Initial Phase
Oscillator 1 Active Timer
Oscillator 2 Initial Phase
Oscillator 2 Active Timer
Oscillator 1 Frequency
Oscillator 2 Frequency
Oscillator 1 Interrupts
Oscillator 2 Interrupts
Oscillator 1 Control
Oscillator 2 Control
Parameter
Parameter
Coefficient
Coefficient
Coefficient
Coefficient
Table 31. Register and RAM Locations Used for Tone Generation
IRQVEC1, IRQEN1
IRQVEC1, IRQEN1
O2TALO/O2TAHI
O1TALO/O1TAHI
OMODE, OCON
OMODE, OCON
O2TILO/O2TIHI
O1TILO/O1TIHI
Register/RAM
Mnemonics
OSC1FREQ
OSC1PHAS
OSC2FREQ
OSC2PHAS
OSC1AMP
OSC2AMP
Location
Preliminary Rev. 0.91
Tone Generator 1
Tone Generator 2
OS2TAS, OS2TIS, OS2TAE,
OS1TAS, OS1TIS, OS1TAE,
example of an output cadence that uses the zero
crossing feature.
One-shot oscillation is possible with OSC1EN and
OSC1TAEN. Direct control over the cadence is
achieved by setting the OSC1EN bit directly if
OSC1TAEN and OSC1TIEN are disabled.
The operation of tone generator 2 is identical to that of
tone generator 1 using its respective control registers.
Note: Tone Generator 2 should not be enabled simulta-
ENSYNC1, OSC1TAEN,
Register/RAM Address
ENSYNC2, OSC2TAEN,
FSKSSEN, OSC1FSK,
OSC1TIEN, OSC1EN
OSC2TIEN, OSC2EN
ZEROEN1, ROUT1,
ZEROEN2, ROUT2,
Register/RAM Bits
OSC1FREQ[15:3]
OSC1PHAS[15:0]
OSC2FREQ[15:3]
OSC2PHAS[15:0]
OSC1AMP[15:0]
OSC2AMP[15:0]
OSC2TA[15:0]
OSC1TA[15:0]
OSC2TI[15:0]
OSC1TI[15:0]
neously with the ringing oscillator because of resource
sharing within the hardware.
OS2TIE
OS1TIE
Si3220/Si3225
Enables all Oscillator 1 param-
Enables all Oscillator 2 param-
Sets oscillator frequency
Sets oscillator frequency
Sets oscillator amplitude
Sets oscillator amplitude
Interrupt enable/status
Interrupt enable/status
Description/Range
Description/Range
0 to 8.19 s (125 µs)
0 to 8.19 s (125 µs)
0 to 8.19 s (125 µs)
0 to 8.19 s (125 µs)
Sets initial phase
Sets initial phase
(default = 0)
(default = 0)
(LSB Size)
eters
eters
55

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