5962-8680505QA E2V, 5962-8680505QA Datasheet - Page 9

• Manufacturer Part Number: 5962-8680505QA
• Manufacturer: E2V

Specifications of 5962-8680505QA

• Lead Free Status / Rohs Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
has a wavelength of 2537 Angstroms (Å). The integrated dose (i.e., UV intensity x exposure time) for exposure should be a
minimum of 15 Ws/cm
µW/cm
dose the device can be exposed to without damage is 7258 Ws/cm
intensity UV light for long periods may cause permanent damage.
4.3.2 Groups C and D inspections.
4.4 Erasing procedure. The recommended erasure procedure for the device is exposure to short-wave ultraviolet light which
4.5 Programming procedures. The programming procedures shall be as specified by the device manufacturer.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
d.
e.
a.
b.
c.
2
power rating. The device should be placed within 1 inch of the lamp tubes during erasure. The maximum integrated
DEFENSE SUPPLY CENTER COLUMBUS
All devices selected for testing shall have the EPROM programmed with a checkerboard pattern or equivalent. After
completion of all testing, the devices shall be erased and verified (except devices submitted for groups B, C, and D
testing).
Subgroups 7 and 8 shall consist of verifying the EPROM pattern specified in 4.3.1d.
End-point electrical parameters shall be as specified in table II herein.
Steady-state life test conditions, method 1005 of MIL-STD-883.
A reprogrammability test shall be added to group C inspection prior to performing the steady-state life test (see 4.3.2b).
Each device in the sample shall be subjected to a minimum 50-program and erase cycles.
(1)
(2)
(3)
(4)
(1)
(2)
(3)
The devices to be submitted to the steady-state life testing shall be subjected to the following tests and examinations.
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43218-3990
All devices selected for testing shall be programmed with a checkerboard pattern or equivalent.
Verify patterns (see 3.10.3).
Erase (see 3.10.1).
Verify pattern erasure (see 3.10.3).
Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified
in method 1005 of MIL-STD-883.
T
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
A
= +125°C, minimum.
2
STANDARD
. The erasure time with this dosage is approximately 25 minutes using an ultraviolet lamp with a 12000
2
(1 week at 12000 µW/cm
SIZE
A
REVISION LEVEL
2
). Exposure of EPROMs to high
F
SHEET
5962-86805
9