ISD5116PY Nuvoton Technology Corporation of America, ISD5116PY Datasheet - Page 72

IC VOICE REC/PLAY 8-16MN 28-DIP

ISD5116PY

Manufacturer Part Number
ISD5116PY
Description
IC VOICE REC/PLAY 8-16MN 28-DIP
Manufacturer
Nuvoton Technology Corporation of America
Series
ISD5100r
Datasheet

Specifications of ISD5116PY

Interface
I²C
Filter Pass Band
1.7 ~ 3.4kHz
Duration
8 ~ 16 Min
Mounting Type
Through Hole
Package / Case
28-DIP (0.600", 15.24mm)
For Use With
ISD-ES511 - EVALUATION SYSTEM FOR ISD5100ISD-ES501 - EVALUATION SYSTEM FOR ISD5008
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISD5116PY
Manufacturer:
Intersil
Quantity:
360
Acknowledge
The number of data bytes transferred between the start and stop conditions from transmitter to
receiver is unlimited. Each byte of eight bits is followed by an acknowledge bit. The acknowledge bit is
a HIGH level signal put on the interface bus by the transmitter during which time the master generates
an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an
acknowledge after the reception of each byte. In addition, a master receiver must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter.
The device that acknowledges must pull down the SDA line during the acknowledge clock pulse so
that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse (set-
up and hold times must be taken into consideration). A master receiver must signal an end of data to
the transmitter by not generating an acknowledge on the last byte that has been clocked out of the
slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a
stop condition.
BY TRANSMITTER
DATA OUTPUT
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
SDA
SCL
Example of an I
MICRO-
CONTROLLER
condition
START
S
GATE
ARRAY
2
C-bus configuration using two microcontrollers
1
Acknowledge on the I
LCD
DRIVER
- 72 -
2
ISD 5116
2
C-bus
STATIC
RAM OR
EEPROM
not acknowledge
Publication Release Date: Oct 31, 2008
acknowledge
8
ISD5100 SERIES
acknowledgement
dock pulse for
9
Revision 1.42

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