74F373 NXP Semiconductors, 74F373 Datasheet
74F373
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74F373 Summary of contents
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... Octal transparent latch (3-State) 74F374 Octal D flip-flop (3-State) Product data Supersedes data of 1994 Dec 05 INTEGRATED CIRCUITS 2002 Nov 20 ...
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... Independent register and 3-State buffer operation SSOP Type II Package DESCRIPTION The 74F373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates. The data on the D inputs is transferred to the latch outputs when the enable (E) input is HIGH ...
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... PIN CONFIGURATION – 74F373 GND SF00250 LOGIC SYMBOL – 74F373 Pin 20 CC GND = Pin 10 SF00251 IEC/IEEE SYMBOL – 74F373 1 EN1 11 EN2 SF00252 2002 Nov 20 PIN CONFIGURATION – 74F374 IEC/IEE SYMBOL – 74F374 Pin 20 CC GND = Pin 10 IEC/IEEE SYMBOL – 74F374 Product data 74F373/74F374 ...
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... Philips Semiconductors Latch/flip-flop LOGIC DIAGRAM FOR 74F373 Pin 20 CC GND = Pin 10 LOGIC DIAGRAM FOR 74F374 Pin GND = Pin 10 FUNCTION TABLE FOR 74F373 INPUTS NOTES High-voltage level h = HIGH state must be present one set-up time before the HIGH-to-LOW enable transition L = Low-voltage level l = LOW state must be present one set-up time before the HIGH-to-LOW enable transition ...
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... INTERNAL OUTPUTS REGISTER Q0 – Load and read register Load and read register Hold NC Z Disable outputs Disable outputs Dn Z PARAMETER 5 Product data 74F373/74F374 OPERATING MODE OPERATING MODE RATING UNIT –0.5 to +7.0 V –0.5 to +7.0 V – –0 +70 C –65 to +150 C LIMITS UNIT UNIT ...
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... MIN MAX 7 MAX 2 MAX 0 MAX 2 MAX 0 MAX CC 74F373 V = MAX CC 74F374 , the use of high-speed test apparatus and/or sample-and-hold +25 C amb TEST CONDITION pF MIN TYP 3.0 5.3 Waveform 3 2.0 3.7 5.0 9.0 Waveform 2 3.0 4.0 74F373 2.0 5.0 Waveform 6 Waveform 7 2.0 5.6 Waveform 6 2 ...
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... Waveform 5 4 PHL SF00258 Waveform 3. Propagation delay for data to output ( PLH V M Waveform 4. Data set-up time and hold times SF00259 7 Product data 74F373/74F374 LIMITS = + +70 C amb V = +5.0 V 10% = +5.0 V UNIT CC = 500 pF 500 TYP MAX MIN MAX 0 1.0 3.0 3.0 4.0 2.0 2 ...
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... Waveform 7. 3-State output enable time to LOW level and output disable time from LOW level V -0. SF00263 90% 7.0V NEGATIVE V M PULSE 10 90% POSITIVE V M PULSE 10% INPUT PULSE REQUIREMENTS family amplitude of pulse OUT 74F 3.0V 8 Product data 74F373/74F374 PZL PLZ +0.3V OL SF00264 t AMP ( THL ( f TLH ( TLH ( r t ...
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... Philips Semiconductors Latch/flip-flop DIP20: plastic dual in-line package; 20 leads (300 mil) 2002 Nov 20 74F373/74F374 9 Product data SOT146-1 ...
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... Philips Semiconductors Latch/flip-flop SO20: plastic small outline package; 20 leads; body width 7.5 mm 2002 Nov 20 74F373/74F374 10 Product data SOT163-1 ...
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... Philips Semiconductors Latch/flip-flop SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm 2002 Nov 20 74F373/74F374 11 Product data SOT339-1 ...
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... Rev Date Description _3 20021120 Product data; third version (9397 750 10758). Supersedes 74F373_374_2 dated 1994 Dec 05 (9397 750 05119). Engineering Change Notice 853–0369 29206 (date: 20021115). Modifications: Corrected ordering information table (from ‘N74374DB’ to ‘74F374DB’). Add SSOP20 (SOT339-1) package outline drawing. ...
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... Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Fax: + 24825 Document order number: 13 Product data 74F373/74F374 Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 11-02 9397 750 10758 ...