TDA9112 STMicroelectronics, TDA9112 Datasheet
TDA9112
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TDA9112 Summary of contents
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... Bus-controlled output voltage Synchronization on hor. frequency with phase selection Selectable polarity of drive signal DESCRIPTION The TDA9112 is a monolithic integrated circuit as- sembled in a 32-pin shrink dual-in-line plastic package. This IC controls all the functions related to horizontal and vertical deflection in multimode or multi-frequency computer display monitors. ...
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CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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9.8.3 -X-ray protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... TDA9112 1 - PIN CONFIGURATION 4/51 H/HVSyn 32 1 VSyn 2 31 HLckVBk 3 30 HOscF 29 4 HPLL2C HGND HPLL1F 24 9 HPosF 23 10 HVDyCor 22 11 HFly 21 12 RefOut 13 20 BComp 14 19 BRegIn 18 15 BISense 16 17 VDyCor SDA SCL Vcc BOut GND HOut XRay EWOut VOut VCap ...
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... VEHTIn VCap HPLL2C 5 H-drive HOut 26 buffer Safety XRay 25 processor BOut 28 B+ PLL2 BIsense 16 DC/DC converter BRegIn 15 controller B+ ref. BComp 14 HV-dynamic correction (focus,brightness) HVDyCor 11 HVDyCor V-amplitude HVDyCor H-amplitude HVDyCor H-symmetry EW generator H size Pin cushion EWOut 24 Keystone Top corners Bottom corners TDA9112 17 HEHTIn ...
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... TDA9112 3 - PIN FUNCTION REFERENCE Pin Name 1 H/HVSyn TTL compatible Horizontal / Horizontal and Vertical Sync. input 2 VSyn TTL compatible Vertical Sync. input 3 HLckVBk Horizontal PLL1 Lock detection and Vertical early Blanking composite output 4 HOscF High Horizontal Oscillator sawtooth threshold level Filter input ...
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... Tracking of horizontal waveform component with Horizontal size/EHT Tracking of vertical waveforms (component) with V. size & position DC/DC controller section Step-up/Step-down conversion mode Internal/External sawtooth configuration Bus-controlled output voltage Soft start/Soft stop feature Positive (N-MOS)/Negative(P-MOS) polarity of BOut signal Characteristic TDA9112 Value Unit SDIP High-end ...
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... TDA9112 5 - ABSOLUTE MAXIMUM RATINGS All voltages are given with respect to ground. Currents flowing from the device (sourced) are signed negative. Currents flowing to the device are signed positive. Symbol V Supply voltage (pin Vcc) CC PinsHEHTIn, VEHTIn, XRay, HOut, BOut PinsH/HVSyn, VSyn, SCL, SDA ...
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... CO = 820pF Pin H/HVSyn Value Value Min. Typ. Max. 10 -2mA 7.65 8.0 8.2 RefO -5 0 Value Min. Typ. Max. 0 0.8 2 0.8 2.2 5 100 175 250 0.5 0.2 0.5 750 0.15 0.21 0.3 0.75 TDA9112 Unit °C °C/W Units Units 9/51 ...
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... TDA9112 6.4 - HORIZONTAL SECTION Vcc = 12V 25°C amb Symbol Parameter PLL1 I Current load on RO pin RO C Capacitance on CO pin CO f Frequency of hor. oscillator HO f Free-running frequency of hor. oscill. HO(0) f Hor. PLL1 capture frequency HOCapt f Temperature drift of free-running freq ---------------------------- - Average horizontal oscillator sensitivity ...
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... VSIZE at minimum VSIZE at medium VSIZE at maximum BCAC (Sad14h) full (9) span VPOS at medium VSIZE at minimum VSIZE at medium VSIZE at maximum and C positions always meet this condition. The formula to calculate RO CO =0.12125/( HO( TDA9112 Value Units Min. Typ. Max. ±1.0 % ±1.8 % ±2.8 % ±1.75 % ±2.2 % ±2.8 % ±1.75 % ± ...
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... TDA9112 6.5 - VERTICAL SECTION V = 12V 25°C CC amb Symbol AGC-controlled vertical oscillator sawtooth; V Ext. load resistance on R L(VAGCCap) VAGCCap pin Sawtooth bottom voltage on V (11) VOB VCap pin Sawtooth top voltage on VCap V VOT pin t Sawtooth Discharge time VODis f Free-running frequency VO(0) f AGC loop capture frequency ...
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... KEYST (Sad0D): x0000000b x1111111b " is the duration of this ramp, VR Value Min. Typ. 1.8 -1.5 1 (15) 2 3.25 4.5 (15) 0 -0.125 HEHT VRefO 100 (15) 0 0.7 1.5 0.25 0.5 0.52 1.92 0.4 -0.4 TDA9112 Units Max. 6 VRefO V/V V/V ppm/° 13/51 ...
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... TDA9112 Symbol Top corner correction compo- V nent of the EW-drive signal on EW-TCor EWOut pin Bottom corner correction compo- V nent of the EW-drive signal on EW-BCor EWOut pin V Tracking of EW-drive signal with EW -------------------------------------------------------- - horizontal frequency max Breathing compensation – ------------------------------------------------------------- - (31 Þ EW- HEHT – Note 19: KEYST at medium (neutral) value. ...
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... HVDC-VAMP at maxi- mum VSIZE (Sad07): x0000000b x1111111b HVDC-VAMP at maxi- mum VPOS (Sad08): (37) x0000000b x1111111b Value Min. Typ. Max. -2 =10k 2.1 200 3.7 1.5 0.9 2 (1.34 -4V (1.07) +24.5 (39) 0 -24.5 500 0 0.5 1 0.5 1.6 0.52 1.92 TDA9112 Units ppm/° 15/51 ...
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... TDA9112 Symbol Vertical Dynamic Correction output VDyCor I Current delivered by VDyCor output VDyCor DC component of the drive signal V VD-DC on VDyCor output Amplitude of V-parabola on VDyCor (40) VD-V output Tracking of V-parabola on VDyCor – ------------------------------------------------- - output with vertical position = VD V – Note 33: HVDC-VAMP at minimum. Note 34: HVDC-HSYM at medium. Note 35: Ratio of the amplitude at HDyCorTr=1 to the amplitude at HDyCorTr=0 (refer to chapter "I map" ...
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... The same values to be found on pin BRegIn, while regulation loop is RefO V (BIsense) ThrBIsConf Value Min. Typ. 5 (18) 100 6 -0.2 -0.5 (41) 0.5 3 1.98 2 0.25 3.65 3.85 4.65 4.9 5.65 5 ThrBIsConf 16 , internal sawtooth configuration for TDA9112 Units Max MHz HVD-Hflat 10 mA 0.4 V 4.05 V 5. 17/51 ...
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... TDA9112 6.9 - MISCELLANEOUS V = 12V 25°C CC amb Symbol Parameter Vertical blanking and horizontal lock indication composite output HLckVBk I Sink current to HLckVBk pin SinkLckBk V Output voltage on HLckVBk output OLckBk Horizontal moiré canceller moire – -------------------------------------- - Modulation Vertical moiré canceller Amplitude of modulation of V-drive V V-moiré ...
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... VOut Byte Waveform V x0000000 amp(min) V mid(VOut) V x1111111 amp(max) V mid(VOut) x0000000 V mid(VOut) x1000000 V mid(VOut) V mid(VOut) x1111111 x0000000: V VOamp Null V VOS-cor V x1111111: VOamp Max. 0 ¼T ¾ VOamp x0000000 V VOC-cor 0 ½T VR x1000000 : V VOamp Null V VOamp V x1111111 VOC-cor 0 ½T VR TDA9112 Effect on Screen 3.5V 3.5V 3. 19/51 ...
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... TDA9112 Function Sad Pin Vertical moiré 0B VOut amplitude Horizontal size 10h EWOut Keystone 0D EWOut correction Pin cushion 0C EWOut correction Top corner 0E EWOut correction Bottom corner 0F EWOut correction 20/51 Byte Waveform V amp x0000000: Null (n-1 x1111111: amp Max. (n-1 0000000x EW-DC(min) 0 ½ ...
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... PCAC(max) x1111111 0 ½ TCAC(min) x0000000 0 ½ TCAC(max) x1111111 0 ½ BCAC(min) x0000000 0 ½ x1111111 BCAC(max) 0 ½ VD-V(max) 01111111 0 ½ VD-V(max) x0000000 0 ½ VD-V(max) 11111111 0 ½T VR TDA9112 Effect on Screen static H-phase static H-phase static H-phase static H-phase static H-phase static H-phase VDyCorPo V VD-DC ...
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... TDA9112 Function Sad Pin HVDyCor vertical 06 HVDyCor amplitude HVDyCor 04 horizontal & HVDyCor adjustments 05 Note 49: For any H and V correction component of the waveforms onEWOut and VOut pins and for internal waveform for corrections of H asymmetry, displayed in the table, the weight of the other relevant components is nullified (minimum for parabola, S-correction, medium for keystone, all corner corrections, C-correction, parallelogram, parabola asymmetry correction, written in corresponding registers) ...
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... HVDC-VAMP (HVDyCor vertical amplitude VSIZE (Vertical size VPOS (Vertical position SCOR (S-correction CCOR (C-correction VMOIRE (Vertical moiré amplitude PCC (Pin cushion correction KEYST (Keystone correction TCC (Top corner correction BCC (Bottom corner correction HSIZE (Horizontal size TDA9112 Reserved Reserved 23/51 ...
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... TDA9112 Sad Reserved 1 12 Reserved 1 13 Reserved 1 14 Reserved 1 VDyCorPol 15 0: ” " 1 XRayReset VSyncAuto effect Reset (52) (52) 0: Off 0: Off READ MODE (SLAVE ADDRESS = 8D) XX HLock VLock 0: Locked 0: Locked (51) 1: Not locked 1: Not lock. Note 50: With exception of HDUTY and BREF adjustments data that can take effect instantaneously if switches HDutySyncV and B+SyncV are at 0 respectively ...
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... HLckVBk is perma- nent Sad17/D1 - VOutEn Vertical Output Enable 0: Disabled, V Vertical section) 1: Enabled, vertical ramp with vertical position offset on VOut pin TDA9112 of status register effect- VExtrDet 2 C Bus data transfer into reg- bit. Also see de- SDetReset bit has no effect ...
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... TDA9112 Sad17/D2 - HBOutEn Horizontal and B+ Output Enable 0: Disabled, levels corresponding to “power transistor off” on HOut and BOut pins (high for HOut, high or low for BOut, depending on bit). BOutPol 1: Enabled, horizontal deflection drive signal on HOut pin providing that it is not inhibited by another internal event (activated XRay protection) ...
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... C bus device reads this register 2 C bus slave address (8D) followed 2 C bus control register map, refer to chap BUS CONTROL REGISTER MAP bus bit. C bus status register (5 flags: VDet, HVDet bus bit) that also uses the detec- TDA9112 2 C bus sub bus 2 C 27/51 ...
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... TDA9112 Figure 2. Horizontal sync signal Positive T H Negative 9.2.2 - Sync. presence detection flags The sync. signal presence detection flags in the status register (VDet, HVDet, VExtrDet) do not Figure 3. Extraction of V-sync signal from H/V-sync signal H/V-sync T H Internal Integration Extracted V-sync 9.2.3 - MCU controlled sync. selection mode ...
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... HPOS . Lock Status PLL1 2 (pin & I LOCK DETECTOR High CHARGE COMP PUMP Low PLL1Pump REF1 HPLL1F mechanism can be disabled 2 C bus bit. PLL1InhEn 2 V-sync (extracted HPLL1F PLL INHIBITION VCO HPosF 10 HPOS SHAPER TDA9112 through HOscF 6 4 HOSC 29/51 ...
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... TDA9112 Figure 6. Horizontal oscillator (VCO) schematic diagram (PLL1 filter HPLL1F + 9 - from charge pump 9.3.3 - Voltage controlled oscillator The VCO makes part of both PLL1 and PLL2 loops, being an “output” to PLL1 and “input” to PLL2. It delivers a linear sawtooth. Figure 6 ex- plains its principle of operation. The linears are ob- ...
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... bus using HMoiré bus bit HBOutEn is set C bus register HDUTY . This is overruled dur- 26 HOut ext. int bus bit or after re bus flag, to protect external 2 C bus bit. This bit kept at 0 TDA9112 /T for soft Hoff bus 31/51 ...
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... TDA9112 for common architecture (B+ and EHT common regulation) and at 1 for separated architecture (B+ and EHT each regulated separately). Figure 10. Control of HOut and BOut at start/stop at nominal V V (HPosF) V HBNorm V BOn V Soft start HOn Start HOut HOut H-duty cycle BOut (positive) B-duty cycle 9 ...
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... All of them are adjustable via I BUS CONTROL REGISTER MAP chapter. Refer to Figure 12, Figure 13 and to chapter TYP- ICAL OUTPUT WAVEFORMS. The correction TDA9112 value (and so RefO 2 C bus control. Transconductance amplifier ...
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... TDA9112 waveforms have no effect in the vertical middle of the screen (if the VPOS control is adjusted to its medium value). As they are summed, the resulting waveform tends to reach its maximum span at top and bottom of the picture. The voltage at the EWOut is top and bottom limited (see parameter V ) ...
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... Vertical ramp Bottom parabola generator Tracking 2 C) HEHTIn/HSize VDC-AMP HDyCorTr (I C) HVDC-VAMP 2 PCC TCC ( BCC (I C) KEYST 2 2 TCAC ( BCAC ( VDyCorPol ( HVDyCor Tracking HEHTIn/HSize 2 Tracking (I C) with Hor Frequency 2 PCAC ( horizontal 24 dyn. phase control 2 PARAL (I C) TDA9112 VDyCor HSize 17 HEHTIn EWOut 35/51 ...
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... TDA9112 Figure 13. EWOut output waveforms V (EWOut) V EW-Key Keystone alone V V (VCap) (VCap 9.6 - DYNAMIC CORRECTION OUTPUTS SECTION 9.6.1 - Composite horizontal and vertical dynamic correction output HVDyCor A composite waveform is output on pin HVDyCor. It consists of a parabola of vertical deflection fre- quency, on which a parabola of horizontal deflec- tion frequency is superimposed ...
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... H-flyback. The output is set On at the end of the short pulse generated by the monostable trigger. Timing of reset of the R-S flip-flop affects duty cy- cle of the output square signal and so the energy transferred from DC/DC converter input to its out- put. A reset edge is provided by comparator C3 if TDA9112 V HVD-H V HVD- bus bit ...
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... TDA9112 the voltage on pin BISense exceeds the internal threshold V . This represents current limi- ThrBIsCurr tation if a voltage proportional to the current through the power component or deflection stage is available on pin BISense. This threshold is af- fected by voltage on pin HPosF, which rises at soft start and descends at soft stop. This ensures self- contained soft control of duty cycle of the output signal on pin BOut ...
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... MCU. This protection is latched; it may be reset either by V drop BUS CONTROL REGISTER MAP). int. Internal sawtooth configuration ext. External sawtooth configuration type type R BOutPol HBOutEn XRayAlarm threshold ThrXRay 2 C bus bit XRayReset(see chapter TDA9112 V CC BOut 2 C 39/51 ...
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... TDA9112 Figure 16. Safety functions - block diagram HBOutEn supervision V CC CCEn + V CCDis _ 29 Vcc XRayReset XRay ThrXRay H-VCO HFly discharge control ThrHFly VOutEn BlankMode HlockEn H-lock detector R V-sawtooth discharge S V-sync 40/ Out L1=No blank/blank level L2=H-lock/unlock level bit/flag HPosF 10 (timing) SOFT START & STOP ...
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... CCDis tive or if the V-drive signal is disabled by VOutEn bus bit +L2 (H) (L) +L2 (L) No Yes Yes 2 C bus bit, when 2 C bus bit, is also thresholds), if the X-ray protection is ac blank/blank level L2 - H-lock/unlock level L1 +L2 (H) (H) +L2 (L) (H) No Yes No No TDA9112 CCEn 41/51 ...
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... TDA9112 Figure 18. Ground layout recommendations 42/ TDA9112 General Ground ...
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... INTERNAL SCHEMATICS Figure 19. 5V Pins 1-2 200 H/HVSyn VSyn Figure 20. 12V 13 HLckVBk l 3 Figure 21. 12V Pin 13 HOSCF Pin 4 Figure 22. HPLL2C Figure 23. RefOut 6 C0 Figure 24 RefOut 12V 13 5 12V RefOut 13 12V RefOut 13 TDA9112 43/51 ...
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... TDA9112 Figure 25. HPLL1F 9 Figure 26. RefOut 12V HPosF 10 Figure 27. 12V 12V HVDyCor 11 44/51 Figure 28. 12V HFly 12 Figure 29. BComp 14 Figure 30. 12V 15 BRegIn ...
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... Figure 31. 12V BIsense 16 Figure 32. 12V 18 VEHTIn 17 HEHTIn Figure 33. 12V Pin 13 VOSCF 19 Figure 34. 12V VAGCCap 20 Figure 35. 12V 22 VCap Figure 36. 12V VOut 23 TDA9112 45/51 ...
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... TDA9112 Figure 37. 12V 24 EWOut 32 VDyCor Figure 38. 12V XRay 25 Figure 39. 12V 26 HOut 28 BOut 46/51 Figure 40. 30 SCL 31SDA ...
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... TDA9112 E E1 Stand-off eA eB Inches Min. Typ. 0.140 0.148 0.020 0.120 0.140 0.014 0.018 0.030 0.040 0.008 0.010 1.080 1.100 ...
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... TDA9112 12 - GLOSSARY AC Alternate Current ACK ACKnowledge bit of I AGC Automatic Gain Control COMP COMParator CRT Cathode Ray Tube DC Direct Current EHT Extra High Voltage EW East-West H/W HardWare HOT Horizontal Output Transistor Inter-Integrated Circuit IIC Inter-Integrated Circuit MCU Micro-Controller Unit NAND Negated AND (logic operation) ...
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... In Horizontal Moiré Cancellation: HMOIRE (pin) becomes HMOIRE (field register). In vertical Dynamic correction Output: VDyCorPol (register) becomes VDyCorPol (bit). January 2001 version 3.7 revision follow-up version 3.1 version 3.1 version 3.2 version 3.2 version 3.4 version 3.4 version 3.5 Version 3.6 TDA9112 2 ...
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... TDA9112 page 7: value for autosync frequency ratio replaced : 4.28 instead of 4.5 previously April 19, 2001 First display on Internet Page 14: parameter VEW-BCor: correction of test condition: saOF instead of OE previously. DATASHEET April 27, 2001 New values from some electrical characteristics page 9: VRefO page10: VHPosF and VTopHPLL2C ...
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