TMP96C041AF TOSHIBA Semiconductor CORPORATION, TMP96C041AF Datasheet
TMP96C041AF
Specifications of TMP96C041AF
Related parts for TMP96C041AF
TMP96C041AF Summary of contents
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... The TMP96C041AF has the improved bus release function, serial interface and RAMless for TMP96C141AF. Oth- erwise, the devices function in the same way. The TMP96C041AF is housed in an 80-pin flat package and is pin compatible with TMP96C141F except the P92 (CTS0/SCLK0). Device characteristics are as follows: (1) Original 16-bit CPU • ...
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... TMP96C041AF 2/20 Figure 1. TMP96C041AF Block Diagram TOSHIBA CORPORATION ...
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... Pin Assignment and Functions The assignment of input/output pins for TMP96C041AF, their name and outline functions are described below. TOSHIBA CORPORATION 2.1 Pin Assignment Figure 2.1 shows pin assignment of TMP96C041AF. Figure 2.1. Pin Assignment (80-pin QFP) TMP96C041AF 3/20 ...
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... TMP96C041AF 2.2 Pin Names and Functions The names of input/output pins and their functions are described below. Number Pin Name I/O of Pins P00 ~ P07 I/O 8 AD0 ~ AD7 Tri-state P10 ~ P17 I/O AD8 ~ AD15 8 Tri-state A8 ~ A15 Output P20 ~ P27 I Output A16 ~ A23 Output ...
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... P83 I/O 1 TO5 Output Note 1: Case of the settable CS2 and CAS2; when TMP96C041AF is bus release, this pin is not added the internal pull-down resistor but is added the internal pull-up resistor. TOSHIBA CORPORATION Functions Port 41: I/O port (with pull-up resistor) Chip select 1: Outputs 0 if address is within specified address area. ...
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... Non-maskable interrupt request pin: Interrupt request pin with falling edge. Can also be operated at rising edge by program. Clock output: Outputs X1 4 clock. Pulled-up during reset. External access: 0 should be inputted with TMP96C041AF. Address latch enable Reset: Initializes LSI. (With pull-up resistor) Oscillator connecting pin ...
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... Core Architecture User Manual.) TOSHIBA CORPORATION 3.2 Memory Map The TMP96C041AF has two register modes. One is minimum mode; in this mode, the area of program memory is 64K bytes maximum. The other is maximum mode; in this mode, the area of the program memory is 16M bytes maximum. ...
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... TMP96C041AF 3.2 Memory Map Figure 3 memory map of the TMP96C041AF. Note: The start address after reset is 8000H. Resetting sets the stack pointer (XSP) on the system mode side to 100H. 8/20 Figure 3.2. Memory Map TOSHIBA CORPORATION ...
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... CS1 Area (Chip Select/Wait Controller) The TMP96C041AF is expanded the part of the 3.3 Bus Release Function The TMP96C041AF has the internal pull-up and pull down resistors to fix the bus control signals at bus release. Table 3.3 Pin Condition at Bus Release (BUSAK = “L”) ...
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... I/O cannot be accessed. But the internal I/O continues Figure 3.3 (1). Example of the Interface Circuit (Bus Releasing Function) 3.4 Serial Function The TMP96C041AF has two Serial I/O devices. But channel 0 and channel 1 are same function except the handshake (CTS0 10/20 to run. So, the watchdog timer also continues to run. There- fore, be careful about bus releasing time and set the detection time of WDT ...
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... Electrical Characteristics 4.1 Absolute Maximum (TMP96C041AF) Symbol IOL IOH PD T SOLDER T STG T OPR TOSHIBA CORPORATION Parameter Power Supply Voltage Input Voltage Output Current (total) Output Current (total) Power Dissipation ( Soldering Temperature (10s) Storage Temperature Operating Temperature TMP96C041AF Rating Unit -0 ...
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... TMP96C041AF 4.2 DC Characteristics (TMP96C041AF 10 - 16MHz - 20MHz) cc (Typical values are for and V Symbol Parameter V IL Input Low Voltage (AD0-15) V IL1 P2, P3, P4, P5, P6, P7, P8 IL2 RESET, NMI, INTO (P87) V IL3 EA V IL4 Input High Voltage (AD0-15) V IH1 P2, P3, P4, P5, P6, P7, P8 IH2 RESET, NMI, INTO (P87) ...
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... AC Electrical Characteristics (TMP96C041AF) No. Symbol Parameter 1 t Osc. Period (= x) OSC 2 t CLK width CLK Valid CLK Hold CLK Valid Hold A0-15 Valid ALE fall ALE fall Hold ALE High width ALE fall RD/WR fall RD/WR rise ALE rise Valid RD/WR fall ...
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... TMP96C041AF (1) Read Cycle 14/20 TOSHIBA CORPORATION ...
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... Write Cycle TOSHIBA CORPORATION TMP96C041AF 15/20 ...
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... TMP96C041AF 4.4 A/D Conversion Characteristics (TMP96C041AF 10 - 16MHz - 20MHz) cc Symbol V Analog reference voltage REF A Analog reference voltage GND V Analog input voltage range AIN I Analog current for analog reference voltage REF Error 4 fc 16MHz (Quantize error of 0.5 LSB not included 20MHz 4.5 Serial Channel Timing - I/O Interface Mode ...
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... NMI, INT0 High level pulse width INTAH t INT4 ~ INT7 Low level pulse width INTBL t INT4 ~ INT7 High level pulse width INTBH TOSHIBA CORPORATION Variable 16MHz Min Max Min Max 4x 250 4x 250 8x + 100 600 8x + 100 600 TMP96C041AF 20MHz Unit Min Max 200 ns 200 ns 500 ns 500 ns 17/20 ...
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... TMP96C041AF 4.8 Timing Chart for I/O Interface Mode 18/20 TOSHIBA CORPORATION ...
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... But the CS2/CAS2 pin does not have the internal programmable pull-up resistor. And in the condition of release, this pin is added the internal pull-up resistor. TOSHIBA CORPORATION Variable 16MHz Min Max Min Max 120 120 1.5x + 120 245 0. TMP96C041AF 20MHz Unit Min Max 120 ns 220 19/20 ...
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... TMP96C041AF Parameter Internal RAM Pin condition at bus release Mapping area of CS1 default setting (B1C1/0: 00) 20/20 The devices TMP96C141AF and TMP96C041AF have much the same function, but they are different from following points. TMP96C141AF 1K byte TMP96C141AF see Figure 3.3 480H ~ 7FFFH TMP96C041AF ...