ADC12048 National Semiconductor, ADC12048 Datasheet
ADC12048
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ADC12048 Summary of contents
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... ADC12048 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter General Description Operating from a single 5V power supply, the ADC12048 bit + sign, parallel I/O, self-calibrating, sampling analog-to-digital converter (ADC) with an eight input fully differential analog multiplexer. The maximum sampling rate is 216 kHz. On request, the ADC goes through a self-calibration process that adjusts linearity, zero and full-scale errors ...
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... Connection Diagrams PLCC Package Order Number ADC12048CIV See NS Package Number V44A Ordering Information Industrial Temperature Range −40˚C ≤ T ADC12048CIV ADC12048CIVF Pin Description PLCC Pkg. PQFP Pkg. Pin Number Pin Number www.national.com 01238702 ≤ +85˚C A Pin Name CH0 The eight analog inputs to the Multiplexer. Active channels are selected based on the contents of bits b3– ...
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... WR is the active low WRITE control input pin. A logic low on this pin and the CS will enable the input buffers of the data pins D12–D0. The signal at this pin is used by the ADC12048 to latch in data on D12–D0. The sense of the WMODE pin at power-up will determine which edge of the WR signal the ADC12048 will latch in data ...
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Pin Description (Continued) PLCC Pkg. PQFP Pkg. Pin Number Pin Number and 41 26 and 35 33 and 42 27 and 36 www.national.com Pin Name AGND Analog ground pin. This is the device’s analog supply ground connection. ...
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... Positive Full-Scale Error Negative Full-Scale Error DC Common Mode Error TUE Total Unadjusted Error Power Supply Characteristics The following specifications apply to the ADC12048 for V sion mode 12.0 MHz 25Ω, source impedance for V CLK S common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for ...
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... Capacitance C ADCIN Input Capacitance ADC C MUX Output Capacitance MUXOUT Reference Inputs The following specifications apply to the ADC12048 for V sion mode 12.0 MHz 25Ω, source impedance for V CLK S common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for all other limits 25˚ ...
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... Auto Zero Time Z t Full Calibration Time CAL CLK Duty Cycle t Conversion Time CONV t Acquisition Time AcqSYNCOUT (Programmable) Digital Timing Characteristics The following specifications apply to the ADC12048, 13-bit data bus width data I/O lines Symbol Parameter t Throughput Rate TPR + = 5V 4.096V REF + and V ...
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... Note 6: Each input and output is protected by a nominal 6.5V breakdown voltage zener diode to GND; as shown below, input voltage magnitude up to 0.3V above 0.3V below GND will not damage the ADC12048. There are parasitic diodes that exist between the inputs and the power supply rails and errors in the A/D A conversion can occur if these diodes are forward biased by more than 50 mV ...
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... Note 22: Any other values placed in the command field are meaningless. However code of 101 or 110 is placed in the command field and the CS, RD and WR go low at the same time, the ADC12048 will enter a test mode. These test modes are only to be used by the manufacturer of this device. A hardware power-off and power-on reset must be done to get out of these test modes ...
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Electrical Characteristics FIGURE 1. Output Digital Code vs the Operating Input Voltage Range (General Case) FIGURE 2. Output Digital Code vs the Operating Input Voltage Range for V www.national.com 01238705 01238706 = 4.096V REF 10 ...
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Electrical Characteristics FIGURE 3. V (Continued) Operating Range (General Case) REF FIGURE 4. V Operating Range for V REF 11 01238707 01238708 = 5V A www.national.com ...
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Electrical Characteristics FIGURE 6. Simplified Error vs Output Code without Auto-Calibration or Auto-Zero Cycles www.national.com (Continued) FIGURE 5. Transfer Characteristic 12 01238709 01238710 ...
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Electrical Characteristics FIGURE 7. Simplified Error vs Output Code after Auto-Calibration Cycle FIGURE 8. Offset or Zero Error Voltage (Note 13) (Continued) 13 01238711 01238712 www.national.com ...
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Timing Diagrams FIGURE 9. Sync-Out Write (WMODE = 1), Read and Convert Cycles FIGURE 10. Sync-In Write (WMODE = 1), Read and Convert Cycles www.national.com 14 01238713 01238714 ...
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Timing Diagrams (Continued) FIGURE 11. Sync-Out Write (WMODE = 1), Read and Convert Cycles FIGURE 12. Sync-In Write (WMODE = 1), Read and Convert Cycles 15 01238746 01238747 www.national.com ...
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Timing Diagrams (Continued) FIGURE 13. Sync-Out Read and Convert Cycles. The MUX channel is the channel selected on the most recent write cycle. FIGURE 14. Sync-In Read and Convert Cycles. The MUX channel is the channel selected on the most ...
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Timing Diagrams (Continued) FIGURE 15. 8-Bit Bus Read Cycle (Sync-Out) FIGURE 16. 8-Bit Bus Read Cycle (Sync-In) 17 01238750 01238751 www.national.com ...
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Timing Diagrams (Continued) FIGURE 17. Write Signal Negates RDY (Writing the Standby, Auto-Cal or Auto-Zero Command) FIGURE 18. Standby and Reset Timing (13-Bit Data Bus Width) www.national.com 18 01238715 01238716 ...
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Typical Performance Characteristics Integral Linearity Error (INL) Change vs. Clock Frequency Zero Error Change vs. Clock Frequency Full-Scale Error Change vs. Temperature (See (Note 19), Electrical Characteristic Section) Full-Scale Error Change vs. Clock Frequency 01238717 Integral Linearity Error (INL) Change ...
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Typical Performance Characteristics Integral Linearity Error (INL) Change vs. Reference Voltage Zero Error Change vs. Reference Voltage Full-Scale Error Change vs. Supply Voltage www.national.com (See (Note 19), Electrical Characteristic Section) (Continued) Full-Scale Error Change vs. Reference Voltage 01238723 Integral Linearity ...
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Typical Performance Characteristics Supply Currents vs. Clock Frequency Analog Supply Current vs. Temperature Full Scale Differential 1,099 Hz Sine Wave Input (See (Note 21), Electrical Characteristic Section) Reference Currents vs. Clock Frequency 01238742 Digital Supply Current vs. Temperature 01238744 Full ...
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Typical Performance Characteristics Full Scale Differential 38,452 Hz Sine Wave Input Half Scale Differential 1 kHz Sine Wave Input 153.6 kHz S Half Scale Differential 40 kHz Sine Wave Input 153.6 kHz S www.national.com (See (Note ...
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... Register Bit Description CONFIGURATION REGISTER (Write Only) This is a 13-bit write-only register that is used to program the functionality of the ADC12048. All data written to the ADC12048 will always go to this register only. The contents MSB COMMAND FIELD Power on State: 0100Hex b –b : The MUX ADDRESS bits configure the analog input ...
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... ADC12048 is configured to interface with an 8-bit data bus; data pins D –D are active and pins TRI-STATE. When the BW bit is a ’1’, the ADC12048 is configured to interface with a 16-bit data bus and data pins D –D are all active. The BW bit is a ’0’ at power-up. 13 ...
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... ADC12048 is in the Standby mode. Any command other than the Standby command written to the Configuration register will get the ADC12048 out of the Standby mode. The STDBY pin will immediately switch to a logic “1” as soon as the ADC12048 is requested to get out of the standby mode. ...
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... The MUX channel and the acquisition time should be set, the SYNC bit cleared and the START com- mand issued with a single write to the ADC12048. In order to initiate a conversion, a single read must be performed from the ADC12048. The rising edge of the read signal will force ...
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... The MUX channel should be selected, the SYNC bit should be set and the START command issued with a single write to the ADC12048. A rising edge on the SYNC pin or on the RD pin will force the RDY signal high recommended that the action of reading from the ADC12048 (not the rising edge of the SYNC signal) be used to raise the RDY signal ...
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... The ADC is especially sensitive to power supply spikes that occur during the auto-zero or lin- earity calibration cycles. The ADC12048 is designed to operate from a single +5V power supply. The separate supply and ground pins for the analog and digital portions of the circuit allow separate ex- ternal bypassing. To minimize power supply noise and ripple, < ...
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... The AGND and DGND in the ADC12048 are not internally connected together. They should be connected together on the PC board right at the chip. This will provide the shortest return path for the signals being exchanged between the internal analog and digital sections of the ADC ...
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... Analog Application Information FIGURE 21. Top View of Printed Circuit Board for a 44-Pin PLCC ADC12048 When measuring AC input signals, any crosstalk between analog input/output lines and the reference lines (CH0–CH7, ± ± ± MUXOUT , ADC should be minimized. REF Crosstalk is minimized by reducing any stray capacitance between the lines ...
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... Physical Dimensions inches (millimeters) unless otherwise noted 44-Lead (10mm x 10mm) Molded Plastic Quad Flat Package 44-Lead Molded Plastic Leaded Chip Carrier Order Number ADC12048CIV NS Package Number V44A Order Number ADC12048CIVF NS Package Number VGZ44A 31 www.national.com ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...