MAX9776ETJ+T Maxim Integrated Products, MAX9776ETJ+T Datasheet - Page 25

• Manufacturer Part Number: MAX9776ETJ+T
• Description: IC AMP AUDIO PWR 1.5W D 32TQFN
• Manufacturer: Maxim Integrated Products
• Series: DirectDrive™r
• Type: Class Dr

Specifications of MAX9776ETJ+T

• Output Type: 1-Channel (Mono) with Stereo Headphones
• Max Output Power X Channels @ Load: 1.5W x 1 @ 4 Ohm; 60mW x 2 @ 16 Ohm
• Voltage - Supply: 2.7 V ~ 5.5 V
• Features: Depop, Differential Inputs, I²C, Mute, Short-Circuit and Thermal Protection, Shutdown, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• For Use With: MAX9776EVKIT+ - EVALUATION KIT FOR MAX9776
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

In conventional single-supply headphone amplifiers, the
output-coupling capacitor is a major contributor of audi-
ble clicks and pops. Upon startup, the amplifier charges
the coupling capacitor to its bias voltage, typically half the
supply. Likewise, during shutdown, the capacitor is dis-
charged to GND. This results in a DC shift across the
capacitor, which, in turn, appears as an audible transient
at the speaker. Since the MAX9775/MAX9776 headphone
amplifier does not require output-coupling capacitors, this
problem does not arise.
In most applications, the output of the preamplifier dri-
ving the MAX9775/MAX9776 has a DC bias of typically
half the supply. During startup, the input-coupling
capacitor is charged to the preamplifier’s DC bias volt-
age, resulting in a DC shift across the capacitor and an
audible click/pop. An internal delay of 30ms eliminates
the click/pop caused by the input filter.
The MAX9775/MAX9776 feature a 0.1µA hard shutdown
mode that reduces power consumption to extend battery
life and a soft shutdown where current consumption is
typically 8.5µA. Hard shutdown is controlled by connect-
ing the SHDN pin to GND, disabling the amplifiers, bias
circuitry, charge pump, and I
phone amplifier output impedance is 1.4kΩ and the
speaker output impedance is 300kΩ. Similarly, the
MAX9775/MAX9776 enter soft-shutdown when the SHDN
bit = 0 (see Table 2). The I
contents of the command register are not affected when
in soft-shutdown. This allows the master to write to the
MAX9775/MAX9776 while in shutdown. The I
is completely disabled in hardware shutdown. When the
MAX9775/MAX9776 are re-enabled the default settings
are applied (see Table 3).
Figure 8. 2-Wire Serial-Interface Timing Diagram
SDA
SCL
t
HD, STA
CONDITION
2 x 1.5W, Stereo Class D Audio Subsystem
START
______________________________________________________________________________________
Click-and-Pop Suppression
t
LOW
with DirectDrive Headphone Amplifier
2
t
C interface is active and the
R
2
C. In shutdown, the head-
t
t
SU, DAT
HIGH
t
F
t
HD, DAT
Shutdown
2
C interface
t
SU, STA
The MAX9775/MAX9776 feature an I
interface consisting of a serial data line (SDA) and a
serial clock line (SCL). SDA and SCL facilitate commu-
nication between the MAX9775/MAX9776 and the mas-
ter at clock rates up to 400kHz. Figure 8 shows the
2-wire interface timing diagram. The MAX9775/
MAX9776 are receive-only slave devices relying on the
master to generate the SCL signal. The master, typical-
ly a microcontroller, generates SCL and initiates data
transfer on the bus. The MAX9775/MAX9776 cannot
write to the SDA bus except to acknowledge the receipt
of data from the master. The MAX9775/MAX9776 will
not acknowledge a read command from the master.
A master device communicates to the MAX9775/
MAX9776 by transmitting the proper address followed
by the data word. Each transmit sequence is framed by
a START (S) or REPEATED START (Sr) condition and a
STOP (P) condition. Each word transmitted over the
bus is 8 bits long and is always followed by an
acknowledge clock pulse.
The MAX9775/MAX9776 SDA line operates as both an
input and an open-drain output. A pullup resistor,
greater than 500Ω, is required on the SDA bus. The
MAX9775/MAX9776 SCL line operates as an input only.
A pullup resistor (greater than 500Ω) is required on
SCL if there are multiple masters on the bus or if the
master in a single-master system has an open-drain
SCL output. Series resistors in line with SDA and SCL
are optional. Series resistors protect the digital inputs of
the MAX9775/MAX9776 from high-voltage spikes on
the bus lines, and minimize crosstalk and undershoot of
the bus signals.
CONDITION
REPEATED
START
t
HD, STA
t
SP
t
SU, STO
CONDITION
STOP
I
2
2
C 2-wire serial
C Interface
t
BUF
CONDITION
START
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