TDA9210 STMicroelectronics, TDA9210 Datasheet
TDA9210
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TDA9210 Summary of contents
Page 1
... The RGB incoming signals are amplified and shaped to drive in DC coupling any commonly used video amplifiers without intermediate follow- er stages. As for any ST Video pre-amplifier, the TDA9210 is able to drive a real load without any external inter- face. One of the main advantages of ST devices is their ...
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... TDA9210 1 - PIN CONNECTION 2 - PIN DESCRIPTION Pin Number Symbol 1 IN1 2 ABL 3 IN2 4 GNDL 5 IN3 6 GNDA 7 V CCA 8 OSD1 9 OSD2 10 OSD3 11 FBLK 12 SCL 13 SDA 14 OUT3 15 GNDP 16 OUT2 17 V CCP 18 OUT1 19 HSYNC/BPCP 20 BLK 2/19 IN1 1 20 BLK ABL 2 HSYNC or BPCP 19 3 IN2 OUT1 18 GNDL ...
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... When bit 0 is set to 0, the BPCP is synchronized on the trailing or leading edge of HSYNC (Pin 19) (bit trailing edge, bit leading edge). VCCP 17 (OCL) Drive Output 18 Stage 16 14 Drive Cut-off 15 3x8bits 8bits Output DC Level 4bits I²C V REF 10 OSD3 1). TDA9210 OUT1 OUT2 OUT3 GNDP 3/19 ...
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... Internal BPCP R8b4 =1 HSYNC/BPCP (Pin19) Internal BPCP 4.4 - ABL Control The TDA9210 includes an ABL (automatic beam limitation) input to attenuate the RGB Video sig- nals depending on the beam intensity. The operating range (from V). A typ- ical 15 dB maximum attenuation is applied to the output signal whatever the contrast adjustment is. ...
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... The DC output level is forced to the "Infra Black" level (V ) when the blanking pulse is equal 4.6 - Drive Adjustment ( bits) In order to adjust the white balance, the TDA9210 offers the possibility of adjusting separately the overall gain of each channel thanks to the I (Registers 3, 4 and 5). The very large drive adjustment range (48 dB) al- lows different standards or custom color tempera- tures ...
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... TDA9210 4.9 - Output Stage The overall waveforms of the output signal are shown in Figure 3. The three output stages, which are large bandwidth output amplifiers, are able to deliver up to 4.4 V for 0 When a high level is applied on the BLK input (Pin 20), the three outputs are forced to "Infra Figure 3 ...
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... Register 9. TDA 9210 Pins 14-16-18 The host MCU can write into the TDA9210 regis- ters. Read mode is not available. In order to write data into the TDA9210, after the “start” message, the MCU must send the following data (see 2 – the I C address slave byte with a low level for the R/W bit, – ...
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... V (instead nominal the expense of output swing voltage. Functioning without Blanking Pulse If no blanking pulse is applied to the TDA9210, the internal BPCP can be connected to the sample and hold circuit (Register 8, bit and BLK pin grounded) so that the output DC level is still con- ...
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... High Level Input Voltage Input Current Input Resistor HS Parameter CC CC Parameter = 25°C amb = 8V, unless otherwise specified. Test Conditions Pin 7 Pin CCA CCP OSD, FBLK, BLK, HSYNC OSD, FBLK, BLK HSYNC TDA9210 Pin Value Units °C - +150 °C Value Units 69 °C/W 80 °C Min. ...
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... TDA9210 ELECTRICAL CHARACTERISTICS T = 25° 5V, V CCA CCP amb R = 100 , serial between output pin and C S Symbol Parameter VIDEO INPUTS (PINS Video Input Voltage Amplitude I VIDEO OUTPUT SIGNAL (PINS 14, 16, 18) - GENERAL GAM Maximum Gain VOM Maximum Video Output Voltage (Note 1) VON ...
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... ABL ABL Test Conditions On Pins SDA, SCL 0 4 SDA Pin when ACK Sink Current = 6mA Parameter t t BUF HDAT t t HDS SUDAT t HIGH TDA9210 Min. Typ. Max. Units Min. Typ. Max. Units 1 0.25 200 0.6 Min. Typ. Max. Units 1300 ...
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... TDA9210 REGISTER DESCRIPTION Table 1. Register Sub-addressed - I Sub-address Hex Dec 01 01 Contrast (CRT) - Note Brightness (BRT Drive 1 (DRV) - Note Drive 2 (DRV) - Note Drive 3 (DRV) - Note Not Used 07 07 OSD Contrast (OSD BPCP & OCL 09 09 Miscellaneous 0A 10 Cut Off Out 1 DC Level (Cut-off) - ...
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... MHz (Note 6) Normal Operation BW DAC output connected to BLK input (for test) BW DAC complementary output connected to BLK input (for test) Source HS edge Selection Selection R8b1 R8b0 Edge Selection TDA9210 POR Value x x (Note POR Value x x Width BPCP Source Selection Selection ...
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... TDA9210 12 - INTERNAL SCHEMATICS Figure 9. V CC5 30k IN (Pins 1-3-5) Figure 10. V CCA 1k 2 ABL GNDA Figure 11. V CCA 4 GNDL 14/19 2 Figure 12. V HIGH IMPEDANCE GNDA Figure 13. OSD-FBLK-HS-BLK Pins 8-9-10 11-19-20 Figure 14. HSYNC GNDA 7 CCA (8V) LOGIC PART GNDA 6 V CCA GNDA 19 GNDA ...
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... Figure 15. 30k SCL 12 (8V) GNDA 30k SCA 13 GNDA Figure 16. V CCP GNDP 15 Figure 17. 4pF GNDL Pins 14-16-18 4pF GNDL GNDA TDA9210 V 17 CCP OUT (20V) GNDA GNDP 15/19 ...
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... TDA9210 Figure 18. TDA9210 - TDA9535/9536 Demonstration Board: Silk Screen and Trace Figure 19. Amplifier and Preamplifier Outputs. Trace Routing (detail) 16/19 OUT1 OUT2 OUT3 19(b) 19(a) IN1 IN2 IN3 ...
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... Figure 20. TDA9210 - TDA9535/9536 Demonstration Board Schematic TDA9210 17/19 ...
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... TDA9210 13 - PACKAGE MECHANICAL DATA 20 Pins — Plastic Dip Dimensions Min 1.39 b 0.381 b1 0.20 C 5.20 D 24.9 E 7.8 e 2.29 e3 22.60 e4 7.36 F 6.22 I 3. 18/19 Millimeters Typ. Max. 3.30 3.35 0.508 1.65 0.457 0.533 0.254 0.30 5.33 5.46 25.15 25.4 8.5 9.1 2 ...
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... Australia - Brazil -Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. 3 The ST logo is a trademark of STMicroelectronics. © 2003 STMicroelectronics - All Rights Reserved Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES http://www.st.com TDA9210 19/19 ...