CY7C343-35HMB Cypress Semiconductor Corporation., CY7C343-35HMB Datasheet
CY7C343-35HMB
Specifications of CY7C343-35HMB
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CY7C343-35HMB Summary of contents
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... Logic Array Blocks (LABs) connected through the Program- mable Inter-connect Array (PIA). There are eight input pins, one that doubles as a clock pin when needed. The CY7C343 also has 28 I/O pins, each connected to a macrocell (six for LABs A and C, and eight for LABs B and D). The remaining 36 macrocells are used for embedded logic ...
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... Document #: 38-03015 Rev. *B USE ULTRA37000™ FOR ALL NEW DESIGNS HLCC, PLCC Top View 7C343 CY7C343 I/O 39 I INPUT 35 INPUT/CLK 34 INPUT 33 GND 32 INPUT 31 I/O 30 I/O 29 Page ...
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... V . Unused The parameter t OUT CC device when driving subsequent registered logic with a positive hold time and using the same clock as the CY7C343. In general must be connected hold time of the subsequent logic (synchronous or asynchronous), then the devices are guaranteed to function properly under worst-case environmental and supply voltage conditions, provided the clock signal source is the same ...
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... CONTROL DELAY t CLR t LAC t PRE LOGIC ARRAY t RSU DELAY LAD SYSTEM CLOCK DELAY t ICS CLOCK DELAY t IC FEEDBACK DELAY t FD I/O DELAY t IO Figure 1. CY7C343 Internal Timing Model CY7C343 OUTPUT DELAY COMB ZX t LATCH INPUT/ OUTPUT Page ...
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... C to +125 C (Case) Min. 2.4 2.2 –0.3 –10 –40 [ 0.5V –30 Commercial Military/Industrial Commercial [5, 6] Military/Industrial Max ALL INPUT PULSES 3.0V 90% 10% GND < 0.5V has been chosen to avoid OUT CY7C343 r5% 5V r10% 5V r10% Max. Unit 0.8 V +10 PA +40 PA –90 mA 125 mA 200 mA ...
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... ALL NEW DESIGNS Over Operating Range Description [8] [9] [5, [5, 8] [5, 8] [8, 13] [8] [5, 8] [5, 8] [8] to the overall delay for the comparable delay without expanders. EXP CY7C343 [7] 7C343-20 7C343-25 Min. Max. Min. Max. Com’l/Ind 20 25 Mil 20 25 Com’l/Ind ...
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... Com’l/Ind 83.3 62.5 H Mil 83.3 62.5 Com’l/Ind 83.3 62.5 Mil 83.3 62.5 Com’l/Ind 3 3 Mil 3 3 Com’l/Ind 20 25 Mil All feedback is assumed to be local, originating within CO1 CY7C343 Max. Unit MHz MHz MHz MHz ns ns Page ...
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... Description [8] [9] [5, 11] [5, 8] [5, 8] [5, 12] [8, 13] [8] [5, 8] [5, 8] [8] [5, 8] [8] [5, 14] [5] ) MAX3 [5, 15 CO1 S1 CY7C343 [7] 7C343-30 7C343-35 Min. Max. Min. Max. Com’l/Ind 30 35 Mil 30 35 Com’l/Ind 44 53 Mil 44 53 Com’l/Ind 44 55 Mil 44 55 Com’ ...
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... MAXA4 ACO1 should be used for both t AWH , is the minimum internal period for an internal asynchronously clocked state machine configuration. This delay is for feedback AS1 CY7C343 [7] 7C343-30 7C343-35 Min. Max. Min. Max. + Com’l/Ind Mil Com’ ...
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... If register output states must also control external points, this frequency can still be observed ACF AS1 AWH AWL . It assumes data and clock input signals are applied to dedicated input pins and no expander logic is used. ACO1 CY7C343 [7] 7C343-20 7C343-25 Min. Max. Min. Com’l/Ind 58 ...
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... Com’l/Ind Mil Com’l/ Ind Mil [29] Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil CY7C343 [7] 7C343-30 7C343-35 Min. Max. Min. Max. Com’l/Ind 15 15 Mil 15 15 7C343-20 7C343-25 Min ...
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... Com’l/Ind Mil [28] Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil [29] Com’l/Ind Mil CY7C343 [7] 7C343-20 7C343-25 Min. Max. Min. Max ...
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... Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Com’l/Ind Mil Mil Com’l/Ind Mil Mil t /t PD1 PD2 CY7C343 [7] 7C343-30 7C343-35 Min. Max. Min. Max. 10 12.5 10 12.5 10 12 ...
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... ALL NEW DESIGNS CO1 CO2 AS1 t ACO1 AOH ACO2 PIA EXP CY7C343 AWH AWL LAC LAD Page ...
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... CLOCK FROM LOGIC ARRAY DATA FROM LOGIC ARRAY OUTPUT PIN Information Speed (ns) Ordering Code 20 CY7C343-20JC/JI 25 CY7C343-25HC/HI CY7C343-25JC/JI 30 CY7C343-30HC/HI CY7C343-30JC/JI CY7C343-30HMB 35 CY7C343-35HC/HI CY7C343-35JC CY7C343-35HMB Document #: 38-03015 Rev. *B USE ULTRA37000™ FOR ALL NEW DESIGNS t t AWH AWL RSU LATCH FD t ...
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... Parameters t PD1 t Subgroups PD2 t PD3 t CO1 ACO1 t ACO2 CY7C343 Subgroups 10, 11 Page ...
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... Package Diagrams Document #: 38-03015 Rev. *B USE ULTRA37000™ FOR ALL NEW DESIGNS 44-Pin Windowed Leaded Chip Carrier H67 CY7C343 51-80079-** Page ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. USE ULTRA37000™ FOR ALL NEW DESIGNS 44-Lead Plastic Leaded Chip Carrier J67 CY7C343 51-85003-*A Page ...
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... Document History Page Document Title: CY7C343 64-Macrocell MAX Document Number: 38-03015 REV. ECN NO. Issue Date ** 106315 04/24/01 *A 122226 12/28/02 *B 213375 See ECN Document #: 38-03015 Rev. *B USE ULTRA37000™ FOR ALL NEW DESIGNS £ EPLD Orig. of Change SZV Change from Spec number: to 38-03015 RBI ...