CY2254ASC-1 Cypress Semiconductor Corporation., CY2254ASC-1 Datasheet

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CY2254ASC-1

Manufacturer Part Number
CY2254ASC-1
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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4A
Features
Intel and Pentium are registered trademarks of Intel Corporation.
Triton is a trademark of Intel Corporation.
Cyrix is a registered trademark of Cyrix Corporation.
Cypress Semiconductor Corporation
Document #: 38-07203 Rev. *A
Logic Block Diagram
• Multiple clock outputs to meet requirements of most
• CPU clock jitter < 200 ps cycle-to-cycle
• Low skew outputs
XTALOUT
Pentium
OE
— Four pin-selectable CPU clocks @ 66.66 MHz, 60.0
— 55.0 MHz pin-selectable CPU clock also available ( 2
— Six PCI clocks at 1/2 CPU Clock frequency
— One I/O clock @ 24 MHz
— One Keyboard Controller clock @ 12 MHz ( 1 option)
— Two Ref. clocks @ 14.318 MHz
— Ref. 14.318 MHz Xtal oscillator input
— < 250 ps between CPU clocks
— < 250 ps between PCI clocks
— < 500 ps between CPU and PCI clocks ( 2 option)
— CPU clock leads PCI clock by +1 ns min. to +4 ns
S0
S1
XTALIN
MHz, and 50.0 MHz for support of Intel Triton
based PC
option only)
or one Universal Serial Bus clock @ 48 MHz
( 2 option)
max. ( 1 option)
®
motherboards
14.318
OSC.
MHz
ROM
CPU
SYS
PLL
PLL
1 option only
DELAY
3901 North First Street
2
2
PCIset
2
Pentium
Functional Description
The CY2254A is a Clock Synthesizer/Driver that provides the
multiple clocks required for a Pentium-based PC. The
CY2254A has low-skew outputs (< 250 ps between the CPU
Clocks, < 250 ps between the PCI Clocks). In addition, the
CY2254A CPU clock outputs have less than 200 ps cy-
cle-to-cycle jitter. Finally, both the PCI and CPU clock outputs
meet the 1 V/ns slew rate requirement of a Pentium proces-
sor-based system.
The CY2254A accepts a 14.318 MHz reference signal as its
input. The CY2254A has 2 PLLs, one of which generates the
CPU and PCI clocks, and the other generates the I/O and Key-
board Controller or USB clocks. The CY2254A runs off either
a 3.3V or 5V supply.
The CY2254A is available in two options. The 1 option sup-
ports the Intel Triton PCIset and provides a 12 MHz keyboard
clock on pin 25. The 2 option provides a 48 MHz USB clock
on pin 25 and supports the Cyrix
• Freq. stability = 0.01% (max.)
• Output duty cycle 45% min. to 55% max.
• Test mode support ( 1 option only)
• 3.3V or 5.0V operation
• Internal pull-up resistors on S0, S1, and OE inputs
REF0 (14.318 MHz)
REF1 (14.318 MHz)
KBDCLK (12 MHz)
IOCLK (24 MHz)
USBCLK (48 MHz)
CPUCLK0
CPUCLK1
CPUCLK2
CPUCLK3
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
San Jose
Clock Synthesizer/Driver
®
Processor Compatible
CPUCLK3
CPUCLK0
CPUCLK1
CPUCLK2
XTALOUT
XTALIN
CA 95134
V
V
V
V
V
OE
S1
S0
Pin Configuration
DD
DD
DD
SS
SS
OPTION
®
Revised December 14, 2002
1
2
M1 processor.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Top View
SOIC
PIN 25
KBDCLK
12 MHz
USBCLK
48 MHz
CY2254A
28
27
26
25
24
23
22
21
20
19
18
17
16
15
408-943-2600
REF0
REF1
V
SEEBELOW
IOCLK
V
PCICLK2
PCICLK3
V
PCICLK4
PCICLK5
V
PCICLK1
PCICLK0
DD
SS
DD
SS

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CY2254ASC-1 Summary of contents

Page 1

Features • Multiple clock outputs to meet requirements of most Pentium ® motherboards — Four pin-selectable CPU clocks @ 66.66 MHz, 60.0 MHz, and 50.0 MHz for support of Intel Triton based PC — 55.0 MHz pin-selectable CPU clock ...

Page 2

Pin Summary Name [1] XTALIN 2 [1] XTALOUT CPUCLK0 6 CPUCLK1 CPUCLK2 9 CPUCLK3 PCICLK0 ...

Page 3

PCI Clock Driver Strength Requirements • Matched impedances on both rising and falling edges on the output drivers • Output impedance: 25 (typical) measured at 1.5V • Maximum output impedance: 40 measured at 1.5V CPU Clock Driver Strength Requirements • ...

Page 4

Electrical Characteristics V DD Parameter Description Notes: 3. Electrical parameters are guaranteed with these operating conditions. 4. Guaranteed by design, not tested. [5] Switching Characteristics Parameter Output t All 1 [4] t CPUCLK, PCICLK 2 [4] t REF, KBDCLK, USBCLK ...

Page 5

Switching Waveforms (continued) Clock Skew 1.5V CPUCLK/ 1.5V PCICLK Notes: 5. All parameters specified with outputs fully loaded. 6. Duty cycle is measured at 1.5V. Document #: 38-07203 Rev. *A CY2254A Page ...

Page 6

... Switching Waveforms (continued) CPU-PCI Clock Skew CPUCLK 1.5V 1.5V PCICLK t 7 Test Circuit V DD Note: All capacitors should be placed as close to each pin as possible. Ordering Information Package Ordering Code Name CY2254ASC 1 S21 CY2254ASC 2 S21 Document #: 38-07203 Rev 0 0 OUTPUTS C ...

Page 7

Package Diagram Document #: 38-07203 Rev. *A © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a ...

Page 8

Document Title: CY2254A Pentium Document Number: 38-07203 Issue REV. ECN NO. Date ** 111723 12/15/01 *A 121838 12/14/02 Document #: 38-07203 Rev. *A ® Processor Compatible Clock Synthesizer/Driver Orig. of Change DSG Change from Spec number: 38-00504 to 38-07203 RBI ...

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