CY2285PVC-2 Cypress Semiconductor Corporation., CY2285PVC-2 Datasheet

CY2285PVC-2

Manufacturer Part Number

CY2285PVC-2

Description

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.CY2285PVC-2.pdf (9 pages)

Available stocks

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Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

CY2285PVC-2

Manufacturer:

PANASONIC

Quantity:

145

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Features

Functional Description

The CY2285 is a clock synthesizer/driver for Pentium II, or

other similar processor-based mobile PCs requiring up to

100-MHz support. The CY2285 outputs two CPU clocks at

2.5V. There are six PCI clocks, running at one-half or one-third

the CPU clock frequency of 66.6 MHz and 100 MHz respec-

tively. One of the PCI clocks is free-running. Additionally, the

part outputs two 3.3V reference clocks at 14.318 MHz.

The CY2285 provides incorporates the Intel®-defined spread

spectrum features. It provides a –0.6% downspread on the

CPU and PCI clocks, which can help reduce EMI in certain

high-speed systems.

Cypress Semiconductor Corporation

• Mixed 2.5V and 3.3V operation

• Complete clock solution for Pentium® II, and other sim-

• Spread Spectrum clocking for EMI control

• 1.5–4.0 ns delay between CPU and PCI clocks

• Power-down, CPU stop and PCI stop pins

• Low skew outputs,

• Early PCI clock leads PCI by 1–4 ns (-2 option)

• DIV4 allows dynamic shifting of CPU and PCI clocks

• Factory-EPROM programmable output drive and slew

• Available in space-saving 28-pin SSOP package

Intel and Pentium are registered trademarks of Intel Corporation.

ilar processor-based motherboards

from the default frequency to default/4 (-2 option)

rate for EMI customization

Logic Block Diagram

— Two CPU clocks at 2.5V up to 100 MHz

— Six synchronous PCI clocks, one free-running

— Two 3.3V Reference clocks at 14.318 MHz

— One 3.3V USB clock running at 48 MHz

— One 3.3V USB/IO clock running at 48 MHz/24 MHz

175 ps between CPU clocks

CPU_STOP

PCI_STOP

PWR_DWN

XTALOUT

XTALIN

DIV4

100-MHz Pentium

14.318

OSC.

MHz

•

3901 North First Street

with Spread Spectrum for Mobile PCs

CPU

PLL

EPROM

SYS

PLL

Divider

Delay

The CY2285 possesses power-down, CPU stop, and PCI stop

pins for power management control. The signals are synchro-

nized on-chip, and ensure glitch-free transitions on the out-

puts. When the CPU_STOP input is asserted, the CPU clock

outputs are driven LOW. When the PCI_STOP input is assert-

ed, the PCI clock outputs (except the free-running PCI clock)

are driven LOW. When the PWR_DWN pin is asserted, the

reference oscillator and PLLs are shut down, and all outputs

are driven LOW.

The CY2285-2 features an early PCI clock which leads the

other PCI clocks by 1–4 ns. The CY2285-2 also features a

DIV4 pin which allows for dynamic shifting of CPU and PCI

clocks from the default frequency to the default/4.

CY2285 Selector Guide

Notes:

CPU (66,

100 MHz)

PCI (CPU/2,

CPU/3 MHz)

Ref. (14.318 MHz)

USB (48 MHz)

USB/IO (48

MHz/24 MHz se-

lectable)

CPU-PCI delay

EPCI-PCI delay

Spread Spectrum

Clock Outputs

STOP

LOGIC

One free-running PCI clock.

One early PCI clock.

STOP

LOGIC

•

II Clock Synthesizer/Driver

San Jose

Downspread

SPREAD (-2,-3 option)

REF0/SPREAD

REF0 (-2 option)

1.5–4.0 ns

CY2285-1

REF1/SEL48

REF1 (-2,-3 option)

EPCICLK (-2 option)

DDREF

PCICLK [1-5]

DDPCI

CPUCLK [0–1]

DDPCI

USBCLK

USB_IOCLK/TS (-1 option)

USBCLK/SEL100/66 (-2 option)

PCICLK_F

DDCPU

DD48

DDPCI

–0.6%

N/A

•

[1]

CA 95134

Downspread

1.5–4.0 ns

1.0–4.0 ns

CY2285-2

–0.6%

N/A

[1, 2]

•

408-943-2600

CY2285

May 18, 2000

Downspread

1.5–4.0 ns

CY2285-3

–0.6%

N/A

[1]

Related parts for CY2285PVC-2

CY2285PVC-2 Summary of contents

Page 1

Pentium Features • Mixed 2.5V and 3.3V operation • Complete clock solution for Pentium® II, and other sim- ilar processor-based motherboards — Two CPU clocks at 2. 100 MHz — Six synchronous PCI clocks, one free-running — ...

Page 2

Pin Configurations SSOP Top View V V SSREF 1 28 DDREF XTAL_IN 2 27 REF1/SEL48 XTAL_OUT 3 26 REF0/SPREAD PCICLK_F DDCPU PCICLK1 24 5 CPUCLK0 PCICLK2 6 23 CPUCLK1 SSPCI V SSCPU V 21 ...

Page 3

Pin Summary: CY2285-2 Name DDCPU V SS [3] XTALIN [3] XTALOUT PCI_STOP CPU_STOP PWR_DWN DIV4 CPUCLK[0:1] PCICLK[1:5] PCICLK_F EPCICLK REF0 REF1 USBCLK/SEL100/66 SPREAD Actual Clock Frequency Values Target Frequency Clock Output (MHz) CPUCLK 66.67 CPUCLK 100 USB ...

Page 4

Function Table: CY2285-1 [4] [4] SEL100 SEL48 TS SPREAD (no spread (–0.6% downspread (no spread (–0.6% downspread) Function Table: CY2285-2 ...

Page 5

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Supply Voltage ..................................................–0.5 to +7.0V Input Voltage .............................................. –0. [5] Operating Conditions Parameter V Analog and Digital 3.3V Supply Voltage DD V ...

Page 6

Switching Characteristics Over the Operating Range Parameter Output Description t All Output Duty Cycle 1 t CPUCLK CPU Clock Rising and 2 Falling Edge Rate t PCICLK PCI Clock Rising and 2 Falling Edge Rate t REF REF Clock ...

Page 7

Switching Waveforms Duty Cycle Timing OUTPUT All Outputs Rise/Fall Time OUTPUT CPU-CPU Clock Skew CPUCLK CPUCLK t 5 CPU-PCI Clock Skew CPUCLK PCICLK t 6 PCI/EPCI-PCI Clock Skew PCI/EPCICLK PCICLK t 7 CPU_STOP CPUCLK (Internal) PCICLK ...

Page 8

... Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock. Ordering Information Package Ordering Code Name CY2285PVC-1 O28 28-Pin SSOP CY2285PVC-2 O28 28-Pin SSOP CY2285PVC-3 O28 28-Pin SSOP Document #: 38-00732-C Operating ...

Page 9

Package Diagram 28-Lead (210-Mil) Shrunk Small Outline Package O28 © Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied ...

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