CY24212SC-3 Cypress Semiconductor Corporation., CY24212SC-3 Datasheet

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Features • Integrated phase-locked loop (PLL) • Low jitter, high-accuracy outputs • VCXO with analog adjust • 3.3V operation Part Number Outputs Input Frequency Range CY24212-1 1 13.5 MHz/27 MHz (selectable) CY24212-2 2 13.5 MHz/27 MHz (selectable) CY24212-3 2 CY24212-5 ...

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Pin Description Name Pin Number XIN 1 Reference Input. VDD 2 Voltage Supply. VCXO 3 Input Analog Control for VCXO. VSS 4 Ground. CLKA 5 27-MHz Clock Output. FSEL (-1,-2) 6 Input Frequency Select, Weak Internal Pull-up. FSEL = 0, ...

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DC Electrical Specifications Parameter Name I Output High Current OH I Output Low Current OL C Input Capacitance IN I Input High Current IH I Input Low Current IL f VCXO Pullability Range ∆XO V VCXO Input Range VCXO I ...

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... Voltage and Timing Definitions Clock Output Clock Output Figure (0 Ordering Information Ordering Code Package Name CY24212SC-1 S8 CY24212SC-1T S8 CY24212SC-2 S8 CY24212SC-2T S8 CY24212SC-3 S8 CY24212SC-3T S8 CY24212SC-5 S8 CY24212SC-5T S8 Lead-free CY24212SXC-5 S8 CY24212SXC-5T S8 Document #: 38-07402 Rev. *C PRELIMINARY Figure 1. Duty Cycle Definition ...

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... BSC 0.0138[0.350] 0.0192[0.487] MediaClock is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-07402 Rev. *C © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...

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Document History Page Document Title: CY24212 MediaClock™ MPEG Clock Generator with VCXO Document Number: 38-07402 Issue Orig. of REV. ECN NO. Date Change ** 117089 09/09/02 *A 120888 12/06/02 *B 123064 02/19/03 *C 345540 See ECN Document #: 38-07402 Rev. ...