CY26049ZI-36 Cypress Semiconductor Corporation., CY26049ZI-36 Datasheet

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CY26049ZI-36

Manufacturer Part Number
CY26049ZI-36
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
CY26049ZI-36
Manufacturer:
CAVIUM
Quantity:
646
Cypress Semiconductor Corporation
Document #: 38-07415 Rev. *C
Features
Benefits
• Fully integrated phase-locked loop (PLL)
• FailSafe output
• PLL driven by a crystal oscillator that is phase aligned
• Output frequencies selectable and/or programmed to
• Low-jitter, high-accuracy outputs
• Commercial and Industrial operation
• 3.3V ± 5% operation
• 16-lead TSSOP
• Integrated high-performance PLL tailored for telecom-
Logic Block Diagram
Pin Configuration
with external reference
standard communication frequencies
munications frequency synthesis eliminates the need
for external loop filter components
frequency select
Input reference
(typical 8 kHz)
FailSafe™ PacketClock™ Global Communications
FS[3:0]
ICLK
CLK/2 7
FAILSAFE
High=ICLK detected
SAFE
ICLK 1
VDD 5
CONTROL
VSS 6
FS1 3
FS2 4
XIN 8
8K 2
3901 North First Street
16-pin TSSOP
TM
CY26049-36
Top View
external pullable crystal
XIN
CONTROLLED
OSCILLATOR
(18.432 MHz)
CRYSTAL
DIGITAL
• When reference is in range, SAFE pin is driven high.
• When reference is off, DCXO maintains clock outputs.
• DCXO maintains continuous operation should the input
• Glitch-free transition simplifies system design
• Selectable output clock rates include T1/DS1, E1,
• Works with commonly available, low-cost 18.432-MHz
• Zero-ppm error for all output frequencies
• Performance guaranteed for applications that require
• Compatible across industry standard design platforms
• Industry standard package with 6.4 x 5.0 mm
16 NC
15 CLK
14 FS0
13 FS3
12 VDD
11 VSS
10 SAFE
9 XOUT
XOUT
SAFE pin is low.
reference clock fail
T3/DS3, E3, and OC-3.
crystal
an extended temperature range
and a height profile of just 1.1 mm.
LOCKED
PHASE
LOOP
San Jose
DIVIDERS
OUTPUT
,
CA 95134
Clock Generator
CLK
CLK/2
Revised July 16, 2004
8K
CY26049-36
408-943-2600
2
footprint
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CY26049ZI-36 Summary of contents

Page 1

FailSafe™ PacketClock™ Global Communications Features • Fully integrated phase-locked loop (PLL) • FailSafe output • PLL driven by a crystal oscillator that is phase aligned with external reference • Output frequencies selectable and/or programmed to standard communication frequencies • Low-jitter, ...

Page 2

Pin Definitions Pin Name Pin Number ICLK 1 Reference Input Clock; 8 kHz MHz Clock Output; 8 kHz or high impedance in buffer mode. FS1 3 Frequency Select 1; Determines CLK outputs per Table ...

Page 3

Frequency Select Tables Table 1. CY26049-36 Frequency Select–Output Decoding Table–External Mode (MHz except as noted) ICLK FS3 FS2 8 kHz kHz kHz kHz kHz kHz ...

Page 4

Absolute Maximum Conditions Supply Voltage (V ) ........................................–0.5 to +7. Input Voltage........................................ –0. Storage Temperature (Non-Condensing) .... –55°C to +125°C Junction Temperature ................................ –40°C to +125°C Recommended Pullable Crystal Specifications Parameter Description F Nominal crystal frequency ...

Page 5

DC Electrical Specifications (Industrial Temp: –40° to 85°C) Parameter Description I Output High Current OH I Output Low Current OL V Input High Voltage IH V Input High Voltage IL I Input High Current IH I Input Low Current IL ...

Page 6

... Test Circuit ICLK 8K C LOAD VDD 0.1uF CLK/2 C LOAD Ordering Information Ordering Code CY26049ZC-36 CY26049ZC-36T CY26049ZI-36 CY26049ZI-36T Lead Free CY26049ZXC-36 CY26049ZXC-36T CY26049ZXI-36 CY26049ZXI-36T Package Diagram 1 4.30[0.169] 4.50[0.177] 16 0.65[0.025] BSC. 0.19[0.007] 0.30[0.012] 0.05[0.002] 0.85[0.033] 0.15[0.006] 0.95[0.037] 4.90[0.193] 5.10[0.200] FailSafe and PacketClock are trademarks of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders ...

Page 7

Document History Page Document Title: CY26049-36 FailSafe™ PacketClock™ Global Communications Clock Generator Document Number: 38-07415 Orig. of REV. ECN NO. Issue Date Change ** 114749 08/08/02 CKN *A 120067 01/06/03 CKN *B 128000 07/15/03 IJA *C 244412 See ECN RGL ...

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