UDA1342TS NXP Semiconductors, UDA1342TS Datasheet - Page 19

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UDA1342TS

Manufacturer Part Number
UDA1342TS
Description
Manufacturer
NXP Semiconductors
Datasheet

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8.16.4
W
RITE CYCLE
2
The write cycle is used to write data from the microcontroller to the internal registers. The I
C-bus format for a write cycle is shown in Table 17.
The device and register addresses are one byte each, data is always two bytes (2-bytes data).
The format of the write cycle is as follows:
1. The microcontroller starts with a START condition S.
2. The first byte (8 bits) contains the device address 0011 01X and a write command (bit R/W = 0).
3. This is followed by an acknowledge (A) from the UDA1342TS.
4. The microcontroller then writes the register address (8 bits) where writing of the register content of the UDA1342TS must start.
5. The UDA1342TS acknowledges this register address.
6. The microcontroller sends 2-bytes data with the Most Significant Data (MSD) byte first and then the Least Significant Data (LSD) byte, where each
byte is acknowledged by the UDA1342TS.
2
7. After the last acknowledge the UDA1342TS frees the I
C-bus and the microcontroller can generate a STOP condition (P).
Table 17 Master transmitter writes to UDA1342TS registers
ACKNOWLEDGE FROM UDA1342TS
DEVICE
REGISTER
(1)
R/W
DATA
ADDRESS
ADDRESS
S
0011 01X
0
A
0XXX XXXX
A
MSD1
A
LSD1
A
MSD2
A
LSD2
A
MSDn
A
LSDn
A
P
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
Note
1. Auto increment of the register address is carried out if repeated groups of 2 bytes are transmitted.

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