M54975FP Mitsumi Electronics, Corp., M54975FP Datasheet

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M54975FP

Manufacturer Part Number
M54975FP
Description
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
DESCRIPTION
The M54975 is a semiconductor integrated circuit fabricated using
Bi-CMOS technology. It contains a serial input to serial/parallel
output 8-bit CMOS shift register and CMOS latch as well as bipolar
8-bit parallel-output driver.
FEATURES
APPLICATION
Thermal printer head dot driver, Serial-to parallel conversion, Relay
and Solenoid driver
FUNCTION
The M54975 consists of an 8-bit D-type flip-flop, the output of
which is connected to 8 latches.
When data is applied to the serial data input (S-IN) and a clock
pulse is applied to clock input (T), an “L” to “H” change of the clock
will cause the data input signals to enter the internal shift registers
and the data in the shift registers will be shifted in order.
BLOCK DIAGRAM
Serial input to serial/parallel output
Cascade connections possible through serial output
Latch circuit included for each stage
Enable input for output control
Serial input/output level is compatible with standard CMOS
Driver : Withstand voltage ...................................... BV
Wide operating temperature range ..................... T
Low supply current .................................. I
Power supply
Enable input
Serial input
Latch input
Large drive current ................................ (I
Clock
LATCH
S-IN
V
EN
CC
T
4
7
6
2
1
3
L-GND
Logic GND
D
T
L
CC
O1
16
Q
D
Q
10 A at standby
O(max)
D
a
T
L D
=-20 – +75 C
O2
15
Q
Q
CEO
=300mA)
D
T
L D
O3
14
30V
Q
Q
D
T
Parallel outputs
L D
13
O4
Bi-CMOS 8-BIT SERIAL-INPUT LATCHED DRIVER
Q
Q
Using a number of M54975 units for bit expansion in series will
entail connecting serial output (S-OUT) to S-IN of the next-stage
M54975.
In parallel output, when the latch input is set to “H” and the output-
control input (enable input EN) is “L”, a clock pulse changing from
“L” to “H” will cause the serial data input signal to appear at output
O1, and the data will be shifted in order at outputs O2 – O8.
The parallel output will yield a signal that is inverted with respect to
the serial data input.
Setting the LATCH input to “L” will prevent data from entering the
latch.
When the EN input is set to “H”, all outputs (O1 – O8) will be set to
OFF. Since the internal logic state of the IC is uncertain at power-
on time, set the EN input to “H” (and outputs O1 – O8 will set to
PIN CONFIGURATION (TOP VIEW)
Serial output
Enable input
Driver GND
Serial input
Logic GND
Latch input
D
T
L D
O5
12
Q
Q
Clock
MITSUBISHI <CONTROL / DRIVER IC>
D
T
L D
11
O6
LATCH
P-GND
L-GND
S-OUT
Q
Q
S-IN
V
EN
CC
T
D
T
L
O7
10
Q
D
Q
Outline
1
2
3
4
5
6
7
8
D
T
L
O8
9
Q
D
Q
16P4(P)
16P2N-A(FP)
M54975P/FP
16
15
14
13
12
11
10
9
8
5
P-GND
S-OUT
O1
O2
O3
O4
O5
O6
O7
O8
Driver GND
Serial output
Parallel outputs

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M54975FP Summary of contents

Page 1

DESCRIPTION The M54975 is a semiconductor integrated circuit fabricated using Bi-CMOS technology. It contains a serial input to serial/parallel output 8-bit CMOS shift register and CMOS latch as well as bipolar 8-bit parallel-output driver. FEATURES Serial input to serial/parallel output ...

Page 2

OFF) until the input data is set and the internal logic state has been determined. L-GND is the ground of the CMOS logic circuit section and P-GND TIMING CHART S-IN T LATCH ...

Page 3

... Clock pulse fall time f(T) MITSUBISHI <CONTROL / DRIVER IC> Bi-CMOS 8-BIT SERIAL-INPUT LATCHED DRIVER =- Conditions S-OUT O1 – OFF O1 – M54975P T = M54975FP Conditions O1 – OFF M54975P M54975FP = =5V, unless otherwise noted Test conditions T =-20 – =4. =0.4V OL ...

Page 4

TIMING CHART Serial input S-IN Clock T Latch input LATCH SWITCHING CHARACTERISTICS (T Symbol Parameter Low-to-high-level output propagation time t PLH From input T to output S-OUT High-to-low-level output propagation time t PHL From input T to output S-OUT Low-to-high-level ...

Page 5

... Current value : output current per circuit 100 0 M54975P/FP Driver output 0.5 1.0 1.5 (V) OL (M54975P 100 Duty cycle (%) (M54975FP) – 5. 100 Duty cycle (%) ...

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