AN87C196JT Intel Corporation, AN87C196JT Datasheet

no-image

AN87C196JT

Manufacturer Part Number
AN87C196JT
Description
Advanced 16-bit CHMOS microcontroller. EPROM 32K, Reg RAM 1.0K, Code RAM 512, I/O 41
Manufacturer
Intel Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AN87C196JT
Manufacturer:
INTEL
Quantity:
5 510
Part Number:
AN87C196JT
Manufacturer:
INTEL
Quantity:
1 200
Part Number:
AN87C196JT
Manufacturer:
INTEL
Quantity:
20 000
Part Number:
AN87C196JT-20
Manufacturer:
INTEL
Quantity:
1 800
Part Number:
AN87C196JT16
Manufacturer:
INTEL
Quantity:
5 510
Part Number:
AN87C196JT16
Manufacturer:
INTEL
Quantity:
1 200
Part Number:
AN87C196JT20
Manufacturer:
INTEL
Quantity:
1 200
Part Number:
AN87C196JTWB
Manufacturer:
Intel
Quantity:
10 000
Part Number:
AN87C196JTWB20
Manufacturer:
INT
Quantity:
3 703
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
The 87C196KR KQ JV JT JR JQ devices represent the fourth generation of MCS 96 Microcontroller prod-
ucts implemented on Intel’s advanced 1 micron process technology These products are based on the
80C196KB device with improvements for automotive applications The instruction set is a true super set of
80C196KB The 87C196JR is a 52-pin version of the 87C196KR device while the 87C196KQ JQ are memory
scalars of the 87C196KR JR
The 87C196JV JT A-step devices (JV-A JT-A) are the newest members of the MCS 96 microcontroller family
These devices are memory scalars of the 87C196JR D-step (JR-D) and are designed for strict functional and
electrical compatibility The JT-A has 32 Kbytes of on-chip EPROM 1 0 Kbytes of Register RAM and 512
bytes of Code RAM The JV-A has 48 Kbytes of on-chip EPROM 1 5 Kbytes of Register RAM and 512 bytes
of Code RAM
87C196KR
87C196KQ
87C196JV
87C196JT
87C196JR
87C196JQ
High Performance CHMOS 16-Bit CPU
Up to 48 Kbytes of On-Chip EPROM
Up to 1 5 Kbytes of On-Chip Register
RAM
Up to 512 Bytes of Additional RAM
(Code RAM)
Register-Register Architecture
Up to 8 Channel 10-Bit A D with
Sample Hold
Up to 37 Prioritized Interrupt Sources
Up to Seven 8-Bit (56) I O Ports
Full Duplex Serial I O Port
Dedicated Baud Rate Generator
Interprocessor Communication Slave
Port
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
b
Device
Other brands and names are the property of their respective owners
40 C to
ADVANCED 16-BIT CHMOS MICROCONTROLLER
87C196KR KQ 87C196JV JT 87C196JR JQ
INTEL CORPORATION 1995
a
Pins Package
68-pin PLCC
68-pin PLCC
52-pin PLCC
52-pin PLCC
52-pin PLCC
52-pin PLCC
125 C Ambient
EPROM
16K
12K
48K
32K
16K
12K
Reg RAM
Automotive
1 5K
1 0K
488
360
488
360
November 1995
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Code RAM
High Speed Peripheral Transaction
Server (PTS)
Two 16-Bit Software Timers
10 High Speed Capture Compare (EPA)
Full Duplex Synchronous Serial I O
Port (SSIO)
Two Flexible 16-Bit Timer Counters
Quadrature Counting Inputs
Flexible 8- 16-Bit External Bus
Programmable Bus (HLD HLDA)
1 75 s 16 x 16 Multiply
3 s 32 16 Divide
68-Pin and 52-Pin PLCC Packages
256
128
512
512
256
128
I O
56
56
41
41
41
41
EPA
10
10
6
6
6
6
SIO
Order Number 270827-006
Y
Y
Y
Y
Y
Y
SSIO
Y
Y
Y
Y
Y
Y
A D
8
8
6
6
6
6

Related parts for AN87C196JT

AN87C196JT Summary of contents

Page 1

... Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1995 Automotive High Speed Peripheral Transaction ...

Page 2

KQ 87C196JV JT 87C196JR JQ The MCS 96 microcontroller family members are all high performance microcontrollers with a 16-bit CPU The 87C196Kx Jx family members listed above are composed of the high-speed (16 MHz) core as well as the ...

Page 3

SFR OPERATION An additional 256 bytes of SFR registers were add the 8XC196KR devices These locations were added to support the wide range of on-chip peripher- als that the 8XC196KR has This memory space Figure 2 The 8XC196KR ...

Page 4

KQ 87C196JV JT 87C196JR JQ 4 Figure 3 Package Diagrams 270827 –2 270827 –3 ...

Page 5

PIN DESCRIPTIONS Symbol V Main supply voltage ( Digital circuit ground (0V) There are three connected to a single ground plane V Reference for the A D converter ( REF analog portion ...

Page 6

KQ 87C196JV JT 87C196JR JQ PIN DESCRIPTIONS (Continued) Symbol Read signal output to external memory RD is active only during external memory reads or LSIO when not used WRL Write and ...

Page 7

ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS Storage Temperature Voltage from ANGND Voltage from Any Other Pin ANGND ...

Page 8

KQ 87C196JV JT 87C196JR JQ DC CHARACTERISTICS (Under Listed Operating Conditions) (Continued) Symbol Parameter V Output High Voltage OH (Outputs Configured as Push Pull) I Input Leakage Current LI (Std Inputs) I Input Leakage Current LI1 (Port 0 A ...

Page 9

NOTES I Max 3 88 Freq Max 1 65 Freq IDLE NOTES I Max 3 25 Freq ...

Page 10

KQ 87C196JV JT 87C196JR JQ AC CHARACTERISTICS (Over Specified Operating Conditions) Test Conditions Capacitance Load on All Pins The system must meet these specifications to work with the 87C196KR Symbol Parameter T Address Valid ...

Page 11

AC CHARACTERISTICS (Over Specified Operating Conditions) (Continued) Test Conditions Capacitance Load on All Pins The 87C196KR will meet these specifications Symbol Parameter T RD Low to CLKOUT RLCL Falling Edge T RD Low Period RLRH ...

Page 12

KQ 87C196JV JT 87C196JR JQ System Bus Timing READY BUSWIDTH TIMING 12 270827 – 5 270827 – 6 ...

Page 13

EXTERNAL CLOCK DRIVE Symbol Parameter 1 T Oscillator Frequency XLXL T Oscillator Period (T XLXL T High Time XHXX T Low Time XLXX T Rise Time XLXH T Fall Time XHXL EXTERNAL CLOCK DRIVE WAVEFORMS AC TESTING INPUT OUTPUT WAVEFORMS ...

Page 14

KQ 87C196JV JT 87C196JR JQ EXPLANATION OF AC SYMBOLS Each symbol is two pairs of letters prefixed by ‘‘t’’ for time The characters in a pair indicate a signal and its condition respectively Symbols represent the time between the ...

Page 15

EPROM PROGRAMMING WAVEFORMS SLAVE PROGRAMMING MODE DATA PROGRAM MODE WITH SINGLE PROGRAM PULSE SLAVE PROGRAMMING MODE IN WORD DUMP OR DATA VERIFY MODE WITH AUTO INCREMENT SLAVE PROGRAMMING MODE TIMING IN DATA PROGRAM MODE WITH REPEATED PROG PULSE AND AUTO ...

Page 16

KQ 87C196JV JT 87C196JR CONVERTER SPECIFICATIONS The speed of the A D converter in the 10-bit or 8-bit modes can be adjusted by setting the AD TIME special function register to the appropriate value The ...

Page 17

HOLD HLDA Timings Symbol Description T HOLD Setup HVCH T CLKOUT Low to HLDA Low CLHAL T CLKOUT Low to BREQ Low CLBRL T HLDA Low to Address Float AZHAL T HLDA Low to BHE INST RD WR Weakly Driven ...

Page 18

KQ 87C196JV JT 87C196JR JQ AC CHARACTERISTICS SLAVE PORT SLAVE PORT WAVEFORM (SLPL ( SLAVE PORT TIMING (SLPL 0) e Symbol Parameter T Address Valid to WR Low SAVWL T RD High to Address Valid SRHAV T ...

Page 19

AC CHARACTERISTICS SLAVE PORT SLAVE PORT WAVEFORM (SLPL ( SLAVE PORT TIMING (SLPL 1) e Symbol Parameter T CS Low to ALE Low SELLL High to CS High SRHEH T ALE Low to RD ...

Page 20

KQ 87C196JV JT 87C196JR JQ AC CHARACTERISTICS SERIAL PORT SHIFT REGISTER MODE SERIAL PORT TIMING SHIFT REGISTER MODE Test Conditions 125 Symbol Parameter T Serial Port Clock Period XLXL ...

Page 21

DEVICES Intel offers 52-lead versions of the 87C196KR de- vice the 87C196JV devices The first samples and production units use the 87C196KR die and bond it out in a 52-lead package It is important to point ...

Page 22

KQ 87C196JV JT 87C196JR JQ application because the application would have to use Port3 for both LSIO and as an external addr data bus If an application uses external memory Port3 should not be selected as push- pull LSIO ...

Page 23

D-step (JR-D) and the 87C196JR C-step (JR-C) For a list of design considerations between 68-lead and 52-lead devices please refer to the 52-lead Device Design Considerations section of this datasheet Since the 87C196JV JT JQ are sim- ply memory ...

Page 24

KQ 87C196JV JT 87C196JR JQ 6 Port2 On the JR and P2 5 are not bonded out but are present internally on the device This al- lows the programmer to write to the port registers and clear ...

Page 25

JQ C and D-Step JR C and D-Step Register RAM 18h to 17Fh 18h to 1FFh Internal (Code) RAM 400h to 47Fh 400h to 4FFh Internal ROM EPROM 2000h to 4FFFh 2000h to 5FFFh It is important to note that ...

Related keywords