LXT362PE Intel Corporation, LXT362PE Datasheet

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LXT362PE

Manufacturer Part Number
LXT362PE
Description
Manufacturer
Intel Corporation
Datasheet

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LXT362
Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications
The LXT362 is a fully integrated, combination transceiver for T1 ISDN Primary Rate Interface
and general T1 long and short haul applications. It operates over 22 AWG twisted-pair cables
from 0 to 6 kft and offers Line Build Outs and pulse equalization settings for all T1 Line
Interface Unit (LIU) applications.
LXT362 provides both a serial port for microprocessor control (Host mode) as well as stand-
alone operation (Hardware mode). The device incorporates advanced crystal-less digital jitter
attenuation in either the transmit or receive data path starting at 3 Hz. B8ZS encoding/decoding
and unipolar or bipolar data I/O are selectable. Loss of signal monitoring and a variety of
diagnostic loopback modes can also be selected.
Applications
Product Features
As of January 15, 2001, this document replaces the Level One document
known as LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications.
ISDN Primary Rate Interface (ISDN PRI)
CSU/NTU interface to T1 Service
Wireless Base Station interface
Fully integrated transceiver for Long or
Short-Haul T1 interfaces
No crystal or high speed external clock
required
Meets or exceeds specifications in ANSI
T1.102, T1.403 and T1.408; and AT&T
Pub 62411
Supports 100
applications
Selectable receiver sensitivity – fully
restores the received signal after
transmission through a cable with
attenuation of either 0 to 26 dB, or 0 to
36 dB @ 772 kHz
Five Pulse Equalization Settings for T1
short-haul applications
— Crystal-less digital jitter attenuation
— Select either transmit or receive path
(T1 twisted-pair)
T1 LAN/WAN bridge/routers
T1 Mux; Channel Banks
Digital Loop Carrier - Subscriber Carrier
Systems
Four Line Build-Outs for T1 long-haul
applications from 0 dB to -22.5 dB
Transmit/receive performance monitors
with Driver Fail Monitor Open and Loss of
Signal outputs
Selectable unipolar or bipolar data I/O and
B8ZS encoding/decoding
Line attenuation indication output in 2.9 dB
steps
QRSS generator/detector for testing or
monitoring
Local, remote, and analog loopback, plus
in-band network loopback code generation
and detection
Multiple register serial interface for
microprocessor control
Available in 28-pin PLCC, 44-pin PQFP,
and 44-pin LQFP packages
Order Number:
Datasheet
January 2001
249033-001

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LXT362PE Summary of contents

Page 1

LXT362 Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications The LXT362 is a fully integrated, combination transceiver for T1 ISDN Primary Rate Interface and general T1 long and short haul applications. It operates over 22 AWG twisted-pair cables from ...

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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Contents 1.0 Pin Assignments and Signal Descriptions 1.1 Mode Dependent Signals ...................................................................................... 9 2.0 Functional Description 2.1 Initialization..........................................................................................................14 2.1.1 Reset Operation .....................................................................................14 2.2 Transmitter ..........................................................................................................14 2.2.1 Transmit Digital Data ...

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LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figures 1 LXT362 Block Diagram ......................................................................................... 7 2 LXT362 Pin Assignments...................................................................................... 8 3 50% Duty Cycle Coding ...................................................................................... 15 4 Serial Port Data Structure ................................................................................... 19 5 TAOS with ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Tables 1 LXT362 Clock and Data Pins by Mode1 ............................................................... 9 2 LXT362 Control Pins by Mode ..............................................................................9 3 LXT362 Signal Descriptions ................................................................................10 4 CLKE Pin Settings1.............................................................................................18 5 Control ...

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LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Revision History Revision Date 6 Description Datasheet ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Figure 1. LXT362 Block Diagram INTERNAL TCLK PATTERN B8ZS/HDB3 GENERATOR TPOS UNIPOLAR (QRSS) ENCODER TNEG MODE QRSS ENCODER ENABLE ENABLE RLOOP NLOOP ENABLE ENABLE TRSTE REMOTE LOOPBACK JASEL MCLK ...

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... RNEG / BPV RPOS / RDATA n/c MODE RNEG / BPV RPOS / RDATA RCLK n/c TRSTE n/c n/c JASEL n MODE LXT362PE XX LXT362PE RCLK 22 8 XXXXXX TRSTE 9 21 XXXXXXXX n JASEL ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 1.1 Mode Dependent Signals As shown in Figure according to the selected mode(s) of operation. These pins, associated signal names and operating modes are summarized in Table 1. LXT362 ...

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LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 3. LXT362 Signal Descriptions Pin # Symbol PLCC QFP 1 39 MCLK 2 41 TCLK 3 42 TPOS / TDATA / INSLER TNEG / INSBPV ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 3. LXT362 Signal Descriptions (Continued) Pin # Symbol PLCC QFP 9 7 TRSTE 11 10 JASEL 12 13 LOS / QPD 13 15 TTIP 16 19 TRING 14 ...

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LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 3. LXT362 Signal Descriptions (Continued) Pin # Symbol PLCC QFP 22 29 GND 23 31 EC1 / INT 24 32 EC2 / SDI 25 35 EC3 / SDO ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 3. LXT362 Signal Descriptions (Continued) Pin # Symbol PLCC QFP 27 37 LLOOP / SCLK TAOS / QRSS / 28 38 CLKE 11, 12, ...

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LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 2.0 Functional Description The LXT362 is a fully integrated, PCM transceiver for long- or short-haul, 1.544 Mbps (T1) applications allowing full-duplex transmission of digital data over existing twisted-pair installations. ...

Page 15

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 2.2.2 Transmit Monitoring In Host mode, the Performance Status Register flags open circuits in bit PSR.DFMO. A transition on DFMO will provide an interrupt, and its transition sets bit ...

Page 16

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 2.3 Receiver A 1:1 transformer provides the interface to the twisted-pair line (RTIP/RING). Recovered data is output at RPOS/RNEG (RDATA in Unipolar mode), and the recovered clock is output ...

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Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 In Hardware mode, the 2-bit register. Setting the JASEL pin High places the JA circuitry in the receive data path; setting JASEL Low places ...

Page 18

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 2.6.1 Interrupt Handling In Host mode, the LXT362 provides a latched interrupt output pin (INT). When enabled, a change in any of the Performance Status Register bits will generate ...

Page 19

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Figure 4. Serial Port Data Structure CS SCLK Address / Command Byte R SDI High Impedance SDO R Read operation R Write ...

Page 20

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 2.7 Diagnostic Mode Operation The LXT362 offers multiple diagnostic modes as listed in modes are only available in Host mode. In Hardware mode, the diagnostic modes are selected by ...

Page 21

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 2.7.1 Loopback Modes 2.7.1.1 Local Loopback (LLOOP) See Figure 5 and Figure (TCLK and TPOS/TNEG or TDATA) loop back through the jitter attenuator (if enabled) and appear at RCLK ...

Page 22

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 6. Local Loopback 2.7.1.2 Analog Loopback (ALOOP) See Figure 7. Analog loopback (ALOOP) exercises the maximum number of functional blocks. ALOOP operation disconnects the RTIP/RRING inputs from the ...

Page 23

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 2.7.1.3 Remote Loopback (RLOOP) See Figure 8. When RLOOP is active, the device ignores the transmit data and clock inputs (TCLK and TPOS/TNEG or TDATA), and bypasses the in-line ...

Page 24

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Attenuator (unless disabled) to RCLK and RPOS/RNEG or RDATA. The data and clock recovered from the twisted-pair line loop back through the transmit circuits to TTIP and TRING without ...

Page 25

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 With QRSS transmission enabled possible to insert a logic error into the transmit data stream by causing a Low-to-High transition on the INSLER pin. However ...

Page 26

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 2.7.2.3 In-Band Network Loop Up or Down Code Generator In-band Network Loop Up or Loop Down code transmission is available in Host mode only. The Loop Up code is ...

Page 27

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 2.7.3.4 Bipolar Violation Detection (BPV) When the internal encoders/decoders are disabled or when configured in Unipolar mode, bipolar violations are reported at the BPV pin. BPV goes High for ...

Page 28

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 2.7.5 Other Diagnostic Reports 2.7.5.1 Receive Line Attenuation Indication This function is only available in Host mode. The Equalizer Status Register (ESR) provides an approximation of the line attenuation ...

Page 29

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 3.0 Register Definitions The LXT362 contains five read/write and three read-only registers that are accessible in Host mode via the serial I/O port. address byte are valid (the address ...

Page 30

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 9. Control Register #1 Read/Write, Address (A7-A0) = x010000x Bit Name 0 EC1 1 EC2 (see 2 EC3 3 EC4 1 = Enable Unipolar I/O mode and allow ...

Page 31

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 11. Control Register #2 Read/Write, Address (A7-A0) = x010001x Bit Name 1 = Enable Remote loopback mode 1 0 ERLOOP 0 = Disable Remote loopback mode 1 = ...

Page 32

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Table 13. Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x Bit Name 1 = Clear/Mask Loss of Signal interrupt. 0 CLOS 0 = Enable Loss of Signal interrupt. 1 ...

Page 33

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 15. Performance Status Register Read Only, Address (A7-A0) = x010101x Bit Name 1 = Loss of Signal occurred. 0 LOS 0 = Loss of Signal did not occur. ...

Page 34

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 4.0 Application Information 4.1 Transmit Return Loss Table 18 shows the transmit return loss values for T1 applications. the receive return loss values. 4.2 Transformer Data Specifications for transformers ...

Page 35

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 20. Recommended Transformers for LXT362 Turns Tx/Rx Ratio 1:1.15 Tx 1:2 Rx 1:1 4.3.1 Hardware Mode Circuit Figure 12 shows a typical LXT362 Hardware mode application. See select ...

Page 36

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 12. Typical Hardware Mode Application 1.544 MHz TCLK TPOS TNEG T1 Framer RCLK RPOS RNEG 68 F 0.1 F NOTES: 1. See Table 18 2. Optional for power ...

Page 37

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Note that if the application includes surge protection, such as a varistor or sidactor on the TTIP/ TRING lines, it may be necessary to reduce the value of the ...

Page 38

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 5.0 Test Specifications Note: Table 21 through Table 28 specifications of the LXT362 and are guaranteed by test except, where noted, by design. The minimum and maximum values listed ...

Page 39

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 23. Digital Characteristics Parameter 1,2 High level input voltage (pins 1-4, 17, 23-25) 1,2 Low level input voltage (pins 1-4, 17, 23-25) 1,2 High level output voltage (pins ...

Page 40

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 14. 1.544 MHz T1 Pulse (DS1 and DSX-1) (See Table 25) 1.5 Normalized Amplitude 1.0 0.5 0.5 -0.5 0.0 Time (in Unit Intervals) -0.5 Table 25. 1.544 MHz ...

Page 41

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Table 26. Master and Transmit Clock Timing Characteristics (See Figure 15) Parameter Transmit clock duty cycle TPOS/TNEG to TCLK setup time TCLK to TPOS/TNEG hold time 1. Typical figures ...

Page 42

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 16. Receive Clock Timing , , Table 28. Serial I/O Timing Characteristics (See Figure 17 and Figure 18) Parameter Rise/fall time—any digital output SDI to SCLK setup time ...

Page 43

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Figure 17. Serial Data Input Timing Diagram Figure 18. Serial Data Output Timing Diagram CLKE = SCLK CS SDO CLKE = ...

Page 44

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 19. Typical T1 Jitter Tolerance 1000 UI 500 UI Jitter @ 10 Hz 138 UI 100 0.4 UI ...

Page 45

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Figure 20. T1 Jitter Attenuation Datasheet 45 ...

Page 46

... LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications 6.0 Mechanical Specifications Figure 21. Plastic Leaded Chip Carrier Package Specifications 28-Pin PLCC • Part Number LXT362PE • Extended Temperature Range (-40 ° ° Dim BSC—Basic Spacing between Centers. ...

Page 47

Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362 Figure 22. Plastic Quad Flat Package Specifications 44-Pin PQFP • Part Number LXT362QE • Extended Temperature Range (-40 ° ° Dim ...

Page 48

LXT362 — Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications Figure 23. Low-Profile Quad Flat Package Specifications 44-Pin LQFP • • D/2 E1 Dimension See ...

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