MCM63P631TQ4.5 Freescale Semiconductor, Inc, MCM63P631TQ4.5 Datasheet

MCM63P631TQ4.5

Manufacturer Part Number

MCM63P631TQ4.5

Description

Manufacturer

Freescale Semiconductor, Inc

Datasheet

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Advance Information

64K x 32 Bit Pipelined BurstRAM

Synchronous Fast Static RAM

a burstable, high performance, secondary cache for the 68K Family, PowerPC ,

and Pentium

This device integrates input registers, an output register, a 2–bit address counter,

and high speed SRAM onto a single monolithic circuit for reduced parts count in

cache data RAM applications. Synchronous design allows precise cycle control

with the use of an external clock (K). CMOS circuitry reduces the overall power

consumption of the integrated functions for greater reliability.

enable (G), sleep mode (ZZ), and Linear Burst Order (LBO) are clock (K) con-

trolled through positive–edge–triggered noninverting registers.

addresses can be generated internally by the MCM63P631 (burst sequence op-

erates in linear or interleaved mode dependent upon state of LBO) and controlled

by the burst address advance (ADV) input pin.

clock (K) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

nous write enable SW are provided to allow writes to either individual bytes or to

all bytes. The four bytes are designated as “a”, “b”, “c”, and “d”. SBa controls

DQa, SBb controls DQb, etc. Individual bytes are written if the selected byte

writes SBx are asserted with SW. All bytes are written if either SGW is asserted

or if all SBx and SW are asserted.

edge–triggered output register and then released to the output buffers at the next

rising edge of clock (K).

are LVTTL compatible.

The PowerPC name is a trademark of IBM Corp., used under license therefrom.

Pentium is a trademark of Intel Corp.

This document contains information on a new product. Specifications and information herein are subject to change without notice.

MOTOROLA FAST SRAM

REV 3

8/4/97

The MCM63P631 is a 2M bit synchronous fast static RAM designed to provide

Addresses (SA), data inputs (DQx), and all control signals except output

Bursts can be initiated with either ADSP or ADSC input pins. Subsequent burst

Write cycles are internally self–timed and are initiated by the rising edge of the

Synchronous byte write (SBx), synchronous global write (SGW), and synchro-

For read cycles, pipelined SRAMs output data is temporarily stored by an

The MCM63P631 operates from a 3.3 V power supply, all inputs and outputs

Motorola, Inc. 1997

MCM63P631–117 = 4.5 ns access / 8.5 ns cycle (117 MHz)

MCM63P631–4.5 = 4.5 ns access / 10 ns cycle (100 MHz)

MCM63P631–7 = 7 ns access / 13.3 ns cycle (75 MHz)

MCM63P631–8 = 8 ns access / 15 ns cycle (66 MHz)

Single 3.3 V + 10%, – 5% Power Supply

ADSP, ADSC, and ADV Burst Control Pins

Selectable Burst Sequencing Order (Linear/Interleaved)

Internally Self–Timed Write Cycle

Byte Write and Global Write Control

Sleep Mode (ZZ)

PB1 Version 2.0 Compatible

Single–Cycle Deselect Timing

JEDEC Standard 100–Pin TQFP Package

microprocessors. It is organized as 64K words of 32 bits each.

MCM63P631

Order this document

CASE 983A–01

TQ PACKAGE

by MCM63P631/D

MCM63P631

TQFP

Related parts for MCM63P631TQ4.5

MCM63P631TQ4.5 Summary of contents

Page 1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 64K x 32 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM63P631 bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the 68K Family, PowerPC ...

Page 2

LBO ADV K ADSC ADSP SA SA1 SA0 SGW SW SBa SBb SBc SBd SE1 SE2 SE3 G ZZ MCM63P631 2 FUNCTIONAL BLOCK DIAGRAM BURST COUNTER K2 CLR 2 16 ADDRESS REGISTER WRITE REGISTER a WRITE REGISTER b WRITE REGISTER ...

Page 3

NC 1 DQc 2 DQc DQc 6 DQc 7 DQc 8 DQc DQc 12 DQc ...

Page 4

PIN DESCRIPTIONS Pin Locations (a) 52, 53, 56, 57, 58, 59, 62, 63 (b) 68, 69, 72, 73, 74, 75, 78 12, 13 (d) 18, 19, 22, 23, 24, ...

Page 5

TRUTH TABLE (See Notes 1 through 5) Address Next Cycle Used SE1 Deselect None 1 Deselect None 0 Deselect None 0 Deselect None X Deselect None X Begin Read External 0 Begin Read External 0 Continue Read Next X Continue ...

Page 6

ASYNCHRONOUS TRUTH TABLE Operation ZZ Read L Read L Write L Deselected L Sleep H LINEAR BURST ADDRESS TABLE (LBO = 1st Address (External) 2nd Address (Internal X00 X01 ...

Page 7

ABSOLUTE MAXIMUM RATINGS (See Note 1) Rating Symbol Power Supply Voltage V DD Voltage Relative for Any out Pin Except V DD Output Current (per I/O) I out Package Power Dissipation P D ...

Page 8

DC OPERATING CONDITIONS AND CHARACTERISTICS ( 3 10%, – 5 Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Input Low Voltage Input High Voltage * V IL – ...

Page 9

AC OPERATING CONDITIONS AND CHARACTERISTICS ( 3 10%, – 5 Unless Otherwise Noted) Input Timing Measurement Reference Level . . . . . . . . . . . ...

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MCM63P631 10 MOTOROLA FAST SRAM ...

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É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É ...

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The MCM63P631 BurstRAM is a high speed synchronous SRAM intended for use primarily in secondary or level two (L2) cache memory applications. L2 caches are found in a variety of classes of computers — from the desktop personal computer to ...

Page 13

K ADDR DQx Q(A) READS Figure 2. Configured as Non–Burst Pipelined Synchronous SRAM MOTOROLA FAST SRAM D Q(B) Q(C) Q( D(E) D(F) D(G) D(H) WRITES MCM63P631 13 ...

Page 14

... Part Number Full Part Numbers — MCM63P631TQ117 MCM63P631 14 ORDERING INFORMATION (Order by Full Part Number) MCM 63P631 Blank = Trays Tape and Reel Speed (117 = 117 MHz, 4.5 = 4 ns) Package (TQ = TQFP) MCM63P631TQ4.5 MCM63P631TQ117R MCM63P631TQ4.5R MCM63P631TQ7 MCM63P631TQ8 MCM63P631TQ7R MCM63P631TQ8R MOTOROLA FAST SRAM ...

Page 15

H A– –A– 100 1 D1 TIPS 0.20 (0.008) C A–B A –H– –C– SEATING PLANE 0.05 (0.002 VIEW AB MOTOROLA FAST SRAM PACKAGE DIMENSIONS TQ ...

Page 16

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...

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