AD1886A Analog Devices, AD1886A Datasheet
AD1886A
Specifications of AD1886A
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AD1886A Summary of contents
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... CHIP SELECT JACK SENSE PHAT STEREO PHAT STEREO GAIN ATTENUATE M = MUTE AC’97 SoundMAX AD1886A SPDIF AD1886A SPDIF OUT 16-BIT - A/D PGA CONVERTER 16-BIT - A/D PGA CONVERTER SAMPLE RATE G G GENERATORS 16-BIT A - D/A M CONVERTER ...
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... AD1886A–SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED Temperature Digital Supply ( Analog Supply ( Sample Rate ( Input Signal Analog Output Pass Band (CS0, CS1, CHAIN_IN ANALOG INPUT Parameter Input Voltage (RMS Values Assume Sine Wave Input) ...
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... REF _OUT Mute Click (Muted Output Minus Unmuted Midscale DAC Output) Guaranteed but not tested. Min 0 0.4 × 0.6 × –74 Min 84 Min kHz) S Min 10 32 2.05 AD1886A Typ Max Unit 0.4 × ± 0.09 dB 0.6 × ∞ 12/f sec S µs 0.0 Typ ...
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... AD1886A–SPECIFICATIONS STATIC DIGITAL SPECIFICATIONS Parameter High-Level Input Voltage (V ): Digital Inputs IH Low-Level Input Voltage ( High-Level Output Voltage ( Low-Level Output Voltage ( Input Leakage Current Output Leakage Current POWER SUPPLY Parameter Power Supply Range—Analog ( Power Supply Range— ...
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... End of Slot 2 to BIT_CLK, SDATA_IN Low Setup to Trailing Edge of RESET (Applies to SYNC, SDATA_OUT) Rising Edge of RESET to HI-Z Delay Propagation Delay RESET Rise Time Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid *Guaranteed but not tested. Specifications subject to change without notice. AD1886A Symbol Min Typ Max t 1.0 RST_LOW t 162 ...
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... AD1886A t RST_LOW t RST2CLK RESET BIT_CLK t t SYNC_HIGH RST2CLK SYNC BIT_CLK t CLK_LOW BIT_CLK t CLK_HIGH t CLK_PERIOD t SYNC_LOW SYNC t SYNC_HIGH t SYNC_PERIOD t SETUP BIT_CLK SYNC SDATA_OUT t HOLD BIT_CLK t t RISECLK FALLCLK SYNC t t RISESYNC FALLSYNC SDATA_IN t t RISEDIN FALLDIN SDATA_OUT t t RISEDOUT FALLDOUT SLOT 1 SLOT 2 ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1886A features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... Crystal (or Clock) Input, 24.576 MHz. Crystal Output AC-Link Serial Data Output, AD1886A Input Stream. AC-Link Bit Clock. 12.288 MHz Serial Data Clock. Daisy-Chain Output Clock. AC-Link Serial Data Input. AD1886A Output Stream. AC-Link Frame Sync AC-Link Reset. AD1886A Master H/W Reset. SPDIF Output ...
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... Analog I/O These signals connect the AD1886A component to analog sources and sinks, including microphones and speakers. Pin Name LQFP I/O PC_BEEP 12 I PHONE 13 I AUX_L 14 I AUX_R 15 I VIDEO_L 16 I VIDEO_R 17 I CD_L 18 I CD_GND_REF 19 I CD_ MIC1 21 I MIC2 22 I LINE_IN_L ...
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... LINE_OUT_L MM LMV MIX M 0x06 A 0x06 0 MONO_OUT 1 MMM MMV S 0x20 A 0x02 M 0x02 LINE_OUT_R MM RMV 0x04 0x04 HP_OUT_R HPM RHV PC_BEEP AD1886A GA 0x0C GA 0x0E GA 0x10 GA 0x12 GA 0x16 PHV MCV LLV LCV LAV RLA RCV RAV M 0x0C M 0x0E M 0x10 M 0x12 M 0x16 PHM MCM LM CM ...
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... X DAM DMS DLSR X ALSR MOD SRX1 SRX8 EN 0D7 REV7 REV6 REV5 AD1886A Default ID5 ID4 ID3 ID2 ID1 ID0 0410h RMV5 RMV4 RMV3 RMV2 RMV1 RMV0 8000h RHV5 RHV4 RHV3 RHV2 RHV1 RHV0 ...
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... Note: Writing any value to this register performs a register reset, which causes all registers to revert to their default values (except 74h, which forces the serial configuration). Reading this register returns the ID code of the part and a code for the type of 3D Stereo Enhancement. ID[9:0] Identify Capability. The ID decodes the capabilities of AD1886A based on the following: Bit = 1 ID0 ID1 ...
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... PC Beep Volume Control. The least significant bit represents 3 dB attenuation. This register controls the output from maximum attenuation of –45 dB. The PC Beep is routed to Left and Right Line outputs even when AD1886A RESET State. This is so Power-On Self-Test (POST) codes can be heard by the user in case of a hardware problem with the PC. ...
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... AD1886A Phone Volume (Index 0Ch ...
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... Volume Table (Index 0Ch to 18h) Mute Function 0 00000 +12 dB Gain 0 01000 0 dB Gain 0 11111 –34.5 dB Gain 1 xxxxx –∞ dB Gain AD1886A ...
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... AD1886A Record Select Control Register (Index 1Ah ...
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... DP3 . . . DP0 Depth 6.67% • • • • 14 93.33% 15 100% AD1886A ...
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... Note: The ready bits are read only; writing to REF, ANL, DAC, ADC will have no effect. These bits indicate the status for the AD1886A subsections. If the bit is a one, that subsection is “ready.” Ready is defined as the subsection able to perform in its nominal state. ...
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... AD1886A ...
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... AD1886A SPDIF Control Register (Index 3Ah ...
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... Slave 1 Codec Register Mask REGM2 Slave 2 Codec Register Mask SLOT16 Enable 16-bit slots. If your system uses only a single AD1886A, you can ignore the register mask bits. SLOT16 makes all AC Link slots 16 bits in length, formatted into 16 slots. Miscellaneous Control Bits (Index 76h ...
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... AD1886A Sample Rate 0 (Index 78h ...
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... SS1 5 SDATA_OUT 6 AD1886A BIT_CLK 7 DV SS2 8 SDATA_IN 9 DV DD2 10 SYNC 11 RESET 12 PC_BEEP FB 600Z SPDIF OUT (CODEC PIN 48 CONNECT AD1886A AVDD + 0 LINE_OUT_R 35 0.1 F LINE_OUT_L 34 47nF CX3D 33 RX3D 32 FILT_L 31 FILT_R 270pF NPO 30 AFILT2 29 AFILT1 28 270pF NPO V REFOUT 27 V REF ...
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... The AD1886A features a Jack Sense pin (JS) that can be used with the HP_OUT or LINE_OUT jacks to automatically mute the other audio outputs. When the Jack Sense pin is connected to one of the output jacks, the AD1886A can sense whether an audio plug has been inserted into the jack and automatically mute the LINE_OUT or MONO_OUT or both outputs. ...
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... C3 220 600Z R3 10k C1 C4 470pF 470pF JACK SENSE MMBD914 2 F CERAMIC OPTIONAL EMC COMPONENTS C2 220 10k 470pF C3 220 470pF 10k AD1886A ISOLATED NC SWITCH HEADPHONE OUT . DD L1 600Z 600Z 4 5 HEADPHONE OUT ...
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... MICROPHONE CONNECTIONS The AD1886A contains an internal microphone preamp with 20 dB gain; in most cases a direct microphone connection as shown in Figure 16 is adequate. If the microphone level is too low, an external preamp can be added as shown in Figure 17. In either case the microphone bias can be derived from the codec’s internal reference (V V signal can also provide the midpoint bias for the amplifier ...
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... MIC INPUT LINE OUTPUT CONNECTIONS The AD1886A Codec provides stereo LINE_OUT signals at a standard 1 V rms level. These signals must be ac-coupled before they can be connected to an external load. After the ac-coupling, a minimal resistive load is recommended to keep the capacitors properly biased and reduce clicks and pops when plugging stereo equipment into the output jack. The capacitor values should be selected to provide a desired frequency response, taking into account the nominal impedance of the external load. To meet the PC99 specifica- tion for PCs, testing must be performed with a 10 kΩ ...
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... AD1886A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead Thin Plastic Quad Flatpack (LQFP) (ST-48) 0.063 (1.60) MAX 0.354 (9.00) BSC SQ 0.030 (0.75 0.018 (0.45 TOP VIEW (PINS DOWN) COPLANARITY 12 25 0.003 (0.08 MIN 0.011 (0.27) 0.019 (0.5) 0.008 (0.2) BSC 0.006 (0.17) 0.004 (0.09 0.006 (0.15) SEATING PLANE 0.002 (0.05) CONTROLLING DIMENSIONS ARE IN MILLIMETERS ...