K4H281638E-TCA2 Samsung, K4H281638E-TCA2 Datasheet
K4H281638E-TCA2
Specifications of K4H281638E-TCA2
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K4H281638E-TCA2 Summary of contents
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DDR SDRAM 128Mb E-die (x4, x8, x16) 128Mb E-die DDR SDRAM Specification Revision 1.3 DDR SDRAM Rev. 1.3 September. 2003 ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) 128Mb E-die Revision History Revision 1.0 (December, 2002) - First release Revision 1.1 (March, 2003) - Complete 128Mb x16 DC current spec. Revision 1.2 (August, 2003) - Deleted speed A0 and Added speed ...
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... Ordering Information Part No. K4H280438E-TC/LB3 K4H280438E-TC/LAA K4H280438E-TC/LA2 K4H280438E-TC/LB0 K4H280838E-TC/LB3 K4H280838E-TC/LAA K4H280838E-TC/LA2 K4H280838E-TC/LB0 K4H281638E-TC/LB3 K4H281638E-TC/LA2 K4H281638E-TC/LB0 Operating Frequencies B3(DDR333@CL=2.5) Speed @CL2 Speed @CL2.5 *CL : CAS Latency Org. Max Freq. B3(DDR333@CL=2.5) AA(DDR266@CL=2) 32M x 4 A2(DDR266@CL=2) B0(DDR200@CL=2 ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Pin Description DDQ DDQ SSQ SSQ ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Package Physical Dimension #66 #1 (1.50) (0.71) NOTE REFERENCE ASS’Y OUT QUALITY #34 #33 22.22±0.10 (10×) 0.65TYP 0.30±0.08 0.65±0.08 (10×) 66pin TSOPII / Package dimension ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Block Diagram (8Mbit x 4 Bank Select CK, CK ADD LCKE LRAS LCBR CK, CK CKE / 4Mbit 2Mbit Banks) 8 /16 CK, CK Data ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Input/Output Function Description SYMBOL TYPE CK, CK Input CKE Input CS Input RAS, CAS, WE Input LDM,(UDM) Input BA0, BA1 Input 11] Input DQ I/O LDQS,(U)DQS I VDDQ ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Command Truth Table COMMAND Register Extended MRS Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write ...
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... SDRAM General Description The K4H280438E / K4H280838E / K4H281638E is 134,217,728 bits of double data rate synchronous DRAM organized as 4x 8,388,608 / 4x 4,194,304 / 4x 2,097,152 words by 4/ 8/16bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous fea- tures with Data Strobe allow extremely high performance up to 333Mb/s per pin. I/O transactions are possible on both edges of DQS. ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) DDR SDRAM Spec Items & Test Conditions Operating current - One bank Active-Precharge; tRC=tRCmin; tCK=7.5ns for DDR266, 6ns for DDR333; DQ,DM and DQS inputs changing once per clock cycle; address and control inputs ...
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... AA(DDR266@CL=2. 110 110 140 120 145 125 165 155 300 300 8Mx16 (K4H281638E) A2(DDR266@CL=2.0) 155 135 185 165 120 105 255 230 250 215 210 195 395 ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) < Detailed test conditions for DDR SDRAM IDD1 & IDD7A > IDD1 : Operating current: One bank operation 1. Only one bank is accessed with tRC(min), Burst Mode, Address and Control inputs on ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) AC Operating Conditions Parameter/Condition Input High (Logic 1) Voltage, DQ, DQS and DM signals Input Low (Logic 0) Voltage, DQ, DQS and DM signals. Input Differential Voltage, CK and /CK inputs Input Crossing ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Overshoot/Undershoot specification for Data, Strobe, and Mask Pins Maximum peak amplitude allowed for overshoot Maximum peak amplitude allowed for undershoot The area between the overshoot signal and VDD must be less than or ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) AC Timming Parameters & Specifications Parameter Row cycle time Refresh row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Parameter Mode register set cycle time DQ & DM setup time to DQS DQ & DM hold time to DQS Control & Address input pulse width DQ & DM input pulse width Power ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Table 4 : Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate Delta Slew Rate tDS +/- 0.0 V/ns 0 +/- 0.25 V/ns +50 +/- 0.5 V/ns +100 Table 5 : Output ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Component Notes 1. tHZ and tLZ transitions occur in the same access time windows as valid data transitions. these parameters are not referenced to a specific voltage level but specify when the device ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) b. Pulldown slew rate is measured under the test conditions shown in Figure 2. Output Figure 2 : Pulldown slew rate test load c. Pullup slew rate is measured between (VDDQ/2 - 320 ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) IBIS :I/V Characteristics for Input and Output Buffers DDR SDRAM Output Driver V-I Characteristics DDR SDRAM Output driver characteristics are defined for full and half strength operation as selected by the EMRS bit ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Pulldown Current (mA) Typical Typical Voltage (V) Low High 0.1 6.0 6.8 0.2 12.2 13.5 0.3 18.1 20.1 0.4 24.1 26.6 0.5 29.8 33.0 0.6 34.6 39.1 0.7 39.4 44.2 0.8 43.7 49.8 ...
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DDR SDRAM 128Mb E-die (x4, x8, x16 0.0 Pullup Characteristics for Weak Output Driver 0.0 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 Pulldown Characteristics for Weak Output ...
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DDR SDRAM 128Mb E-die (x4, x8, x16) Pulldown Current (mA) Typical Typical Voltage (V) Low High 0.1 3.4 3.8 0.2 6.9 7.6 0.3 10.3 11.4 0.4 13.6 15.1 0.5 16.9 18.7 0.6 19.6 22.1 0.7 22.3 25.0 0.8 24.7 28.2 ...