TC551001BPL TOSHIBA Semiconductor CORPORATION, TC551001BPL Datasheet

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TC551001BPL

Manufacturer Part Number
TC551001BPL
Description
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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TC551001BPL-10
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TC551001BPL-85L
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Quantity:
20 000
TOSHIBA
SILICON GATE CMOS
131,072 WORD x 8 BIT STATIC RAM
Description
The TC551001BPL is a 1,048,576 bits static random access memory organized as 131,072 words by 8 bits using CMOS technology,
and operated from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an
operating current of 5mA/MHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is
placed in a low power standby mode in which the standby current is 2 A typically. The TC551001BPL has three control inputs.
Chip Enable inputs (CE1, CE2) allow for device selection and data retention control, while an Output Enable input (OE) provides fast
memory access. The TC551001BPL is suitable for use in microprocessor application systems where high speed, low power, and
battery backup are required.
outline plastic package (forward, reverse type).
Pin Names
Features
• Low power dissipation :
• Standby current:
• 5V single power supply
• Access time (max.)
• Power down feature:
• Data retention supply voltage:
• Inputs and outputs directly TTL compatible
• Package
Access Time
CE1 Access Time
CE2 Access Time
OE Access Time
I/O1 ~ I/O8
PIN NAME
PIN NAME
CE1, CE2
A0 ~ A16
PIN NO.
PIN NO.
GND
The TC551001BPL is offered in a standard dual-in-line 32-pin plastic package, a small outline plastic package, and a thin small
N.C.
R/W
V
OE
DD
Address Inputs
Read/Write Control Input
Output Enable Input
Chip Enable Inputs
Data Input/Output
Power (+5V)
Ground
No Connection
A
17
A
1
11
3
TC551001BPL
TC551001BFL
TC551001BFTL
TC551001BTRL
A
18
A
2
TC551001BPL/BFL/BFTL/BTRL
9
2
70ns
70ns
70ns
35ns
-70L
A
19
A
3
27.5mW/MHz (typ.)
4 A (max.) at Ta = 25 C
CE1, CE2
8
1
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC
A
20
A
4
13
0
2.0 ~ 5.5V
: DIP32-P-600
: SOP32-P-525
: TSOP32-P-0820
: TSOP32-P-0820A
85ns
85ns
85ns
45ns
-85L
R/W
I/O1
21
5
CE2
I/O2
22
6
TC551001BPL/BFL/BFTL/BTRL-70L/85L
I/O3
A
23
7
Pin Connection (Top View)
15
TSOP Pinout
GND
V
24
8
DD
I/O4
NC
25
9
I/O5
A
10
26
16
I/O6
A
11
27
14
I/O7
A
12
28
12
.
I/O8
13
A
29
7
CE1
14
A
30
6
A
15
A
31
10
5
OE
16
A
32
4
1

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TC551001BPL Summary of contents

Page 1

... When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current typically. The TC551001BPL has three control inputs. Chip Enable inputs (CE1, CE2) allow for device selection and data retention control, while an Output Enable input (OE) provides fast memory access ...

Page 2

... TC551001BPL/BFL/BFTL/BTRL-70L/85L Block Diagram Operating Mode OPERATION MODE CE1 Read L Write L Output Deselect L H Standby * * Maximum Ratings SYMBOL ITEM V Power Supply Voltage DD V Input Voltage IN V Input and Output Voltage I/O P Power Dissipation D T Soldering Temperature (10s) SOLDER T Storage Temperature STRG T Operating Temperature OPR * -3 ...

Page 3

... CE2 DD Capacitance (Ta = 25º 1MHz) SYMBOL PARAMETER C Input Capacitance IN C Output Capacitance OUT Note: This parameter is periodically sampled and is not 100% tested. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L MIN. TYP. MAX. UNIT 4.5 5.0 5.5 2.2 – 0 -0.3* – ...

Page 4

... MIN. MAX. 70 – 85 – 70 – – 70 – – 70 – – 35 – 10 – – 5 – 25 – – 25 – 10 – 10 TC551001BPL/BFL/BFTL/BTRL -70L -85L MIN. MAX. MIN. MAX. 70 – – – – – 0 – 25 – 5 – – – ...

Page 5

... SR01020795 Timing Waveforms (1) Read Cycle (4) Write Cycle 1 (R/W Controlled Write) TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L 5 . ...

Page 6

... TC551001BPL/BFL/BFTL/BTRL-70L/85L (4) Write Cycle 2 (CE1 Controlled Write) (4) Write Cycle 3 (CE2 Controlled Write) 6 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM SR01020795 . ...

Page 7

... Outputs remain in a high impedance state. 4. Assuming that OE is High for a Write Cycle, Outputs are in a high impedance state during this period. 5. The I/O may be in the output state during this time, input signals of opposite phase must not be applied. TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L 7 . ...

Page 8

... TC551001BPL/BFL/BFTL/BTRL-70L/85L Data Retention Characteristics ( SYMBOL PARAMETER V Data Retention Supply Voltage DH I Standby Current DDS2 t Chip Deselect to Data Retention Mode CDR t Recovery Time (max CE1 Controlled Data Retention Mode CE2 Controlled Data Retention Mode Notes the CE1 controlled data retention mode, minimum standby current is achieved under the condition CE2 ...

Page 9

... SR01020795 Outline Drawing DIP32-P-600 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L Unit ...

Page 10

... TC551001BPL/BFL/BFTL/BTRL-70L/85L Outline Drawing SOP32-P-525 10 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM SR01020795 Unit ...

Page 11

... SR01020795 Outline Drawing TSOP32-P-0820 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC Static RAM TC551001BPL/BFL/BFTL/BTRL-70L/85L Unit ...

Page 12

... TC551001BPL/BFL/BFTL/BTRL-70L/85L Outline Drawing TSOP32-P-0820A 1. This technical data may be controlled under U.S. Export Administration Regulations and may be subject to the approval of the U.S. Department of Commerce prior to export. Any export or re-export, directly or indi- rectly, in contravention of the U.S. Export Administration Regulations is strictly prohibited. 2. LIFE SUPPORT POLICY Toshiba products described in this document are not authorized for use as critical components in life support systems without the written consent of the appropriate officer of Toshiba America, Inc. Life support sys- tems are either systems intended for surgical implant in the body or systems which sustain life ...

Page 13

Back to Memory ...

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