M6MGT166S4BWG MITSUBISHI, M6MGT166S4BWG Datasheet
M6MGT166S4BWG
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M6MGT166S4BWG Summary of contents
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... DESCRIPTION The MITSUBISHI M6MGB/T166S4BWG is a Stacked Chip Scale Package (S-CSP) that contents 16M-bits flash memory and 4M-bits Static RAM in a 72-pin S-CSP. 16M-bits Flash memory is a 1,048,576 words, 3.3V-only, and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and DINOR(DIvided bit-line NOR) architecture for the memory cell ...
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... Y-DECODER STATUS / ID REGISTER CUI WSM WSM DATA INPUTS/OUTPUTS 262144 WORD x 16 BITS CLOCK GENERATOR MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) 32KW 32KW 16KW 16KW 16KW 16KW 16KW 16KW 16KW 16KW MULTIPLEXER INPUT/OUTPUT BUFFERS ...
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... Bank(II) Main Block ......................................... Program/Erase cycles 3 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 4,194,304-BIT (262,144-WORD BY 16-BIT) CMOS SRAM Boot Block 1048,576 word x 16bit M6MGB166S4BWG M6MGT166S4BWG Other Functions V = 2.7~3.6V CC Soft Ware Command Control Selective Block Lock 90ns (Max.) Erase Suspend/Resume Program Suspend/Resume Status Register Read 54 mW (Max ...
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... The power consumption becomes the same as the stand-by mode. While in this mode, the output data is latched and can be read out. New data is read out correctly when addresses are changed. MITSUBISHI LSIs After Apr. 1999 , Rev.1.7 ...
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... MEMORY ORGANIZATION The Flash Memory of M6MGB/T166S4BWG has one 16Kword boot block, seven 16Kword parameter blocks, for Bank(I) and twenty-eight 32Kword main blocks for Bank(II). A block is erased independently of other blocks in the array. MITSUBISHI LSIs Low LKO, see P.10. LKO, Apr. 1999 , Rev.1.7 ...
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... MAIN BLOCK 6 30000H-37FFFH 32Kword MAIN BLOCK 5 28000H-2FFFFH 32Kword MAIN BLOCK 4 20000H-27FFFH 32Kword MAIN BLOCK 3 18000H-1FFFFH 32Kword MAIN BLOCK 2 10000H-17FFFH 08000H-0FFFFH 32Kword MAIN BLOCK 1 00000H-07FFFH 32Kword MAIN BLOCK 0 F-A -F (Word Mode) Flash Memory of M6MGT166S4BWG Memory Map Apr. 1999 , Rev.1.7 ...
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... MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) F-RP# DQ 0-15 V Data out IH V Status Register Data IH Lock Bit Data ( Identifier Code ...
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... Bank Write D0H Bank Write 71H X Read 77H Write Bank Write Write X Write A7H MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) 2nd bus cycle 3rd ~129th bus cycles (Word Mode) Data Mode Address Address (DQ15- ...
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... Locked Locked Locked Unlocked Unlocked Locked All Blocks Unlocked "1" Ready Suspended Error Error Error - - - MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Note Definition "0" Busy Operation in Progress / Completed Successful Successful Successful - - - Apr. 1999 , Rev.1.7 ...
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... OUT F-V = 3.6V F-CE# =F-WE F-RP#=F-OE#=V IH F-VCC = 3.6V, VIN=VIL/VIH, F-CE# = F-RP# =F-WP# = VIH F-VCC = 3.6V, VIN=VIL/VIH, F-CE# = F-RP# =F-WP# = VIH F-VCC = 3.6V, VIN=VIL/VIH, F-CE# = F-RP# =F-WP# = VIH I = 4.0mA –2.0mA –100 A OH MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package ...
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... Min 150 (Ta = -20 ~85 C, F-Vcc = 2.7V ~3.6V) Parameter Min 150 MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Limits F-Vcc=2.7-3.6V Unit 90ns Typ Max ...
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... Min 150 Typ Min 40 1.0 4 Typ Min Min Typ 2 MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Limits F-Vcc=2.7-3.6V Unit 90ns Typ Max ...
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... (AD (CE (OE) t OLZ t CLZ OUTPUT VALID MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Read /Write Inhibit TEST CONDITIONS FOR AC CHARACTERISTICS Input voltage : Input rise and fall times : 5ns Reference voltage DF(CE) at timing measurement : 1.5V ...
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... VALID a(CE) t a(OE OEH GHEL DIN DOUT DIN MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) READ STATUS PROGRAM REGISTER ARRAY COMMAND BANK ADDRESS VALID 7FH t a(CE) t a(OE) t OEH t DAP SRD DIN t WHRL ...
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... VALID CEP t OEH DIN EHRL t DAP MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) READ STATUS WRITE READ REGISTER ARRAY COMMAND BANK(I) ADDRESS VALID t a(CE) t a(OE) SRD FFH t BLH (to only BANK(I)) READ STATUS WRITE READ ...
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... CEPH t OEH t DAE 20H D0H t EHRL t BLS MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) READ STATUS ERASE REGISTER ARRAY COMMAND BANK ADDRESS VALID t a(CE) t a(OE) SRD t BLH READ STATUS ERASE REGISTER ARRAY COMMAND BANK ADDRESS VALID ...
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... ADDRESS VALID 01H~7EH 00H 7FH DIN DIN DIN t DH MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Change Bank Address ARRAY READ FROM THE OTHER BANK WITH BGO VALID VALID t a(CE) t a(OE) t OEH SRD DOUT ...
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... ADDRESS VALID VALID OEH DIN SRD EHRL MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Change Bank Address ARRAY READ FROM BANK(II) WITH BGO VALID VALID VALID VALID t a(CE) t a(OE) DOUT DOUT Change Bank Address ...
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... OEH D0H SRD EHRL MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Change Bank Address ARRAY READ FROM THE OTHER BANK WITH BGO VALID VALID t a(CE) t a(OE) DOUT DOUT Change Bank Address READ DATA FROM THE OTHER BANK ...
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... OEH Program Suspend Latency WP B0H t BLS t AH CEP t OEH Program Suspend Latency t WH B0H t BLS MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) READ STATUS REGISTER BANK ADDRESS VALID t a(CE) t a(OE) S.R.6,7=1 VALID SRD t BLH READ STATUS REGISTER BANK ADDRESS VALID ...
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... ADDRESS n, DATA n NO WRITE B0H ? YES STATUS REGISTER SUSPEND LOOP WRITE D0H YES FULL STATUS CHECK PAGE PROGRAM MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) LOCK BIT PROGRAM FLOW CHART START WRITE 77H WRITE D0H BLOCK ADDRESS SR ...
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... Please use BGO function. BLOCK ERASE FLOW CHART NO WRITE B0H ? YES SUSPEND LOOP WRITE D0H YES MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) START SUSPEND WRITE B0H STATUS REGISTER READ SR ...
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Read/Standby State 50H Clear Status Register D0H WD Setup State 55H 74H Clear Single Data Load Page Buffer to Flash Page Buffer to Page Buffer Setup Setup Setup OTHER Internal State Ready Read State with BGO Read Array (From The ...
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... Write Read Write Read MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Icc DQ0~7 DQ8~15 High-Z High-Z Standby Standby High-Z High-Z Standby High-Z High-Z Standby High-Z High-Z Din High-Z Active Dout ...
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... Other inputs=0~S-Vcc + +25 C S-LB# and S-UB#=V or S-CE1#=V or S-CE2 Other inputs S-Vcc Conditions V =GND, V =25mVrms, f=1MHz GND,V =25mVrms, f=1MHz O O MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Ratings Units -0 -0.5 ~ S-Vcc + 0 S-Vcc 700 + +150 C < ...
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... Limits SRAM Min Limits SRAM Min MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package Fig.1 Output load Units Max ...
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... DATA IN STABLE MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package ( (LB) or (UB) dis dis t (CE1) dis t (CE2) dis t (OE) dis VALID DATA (Note3) (Note3) (Note3) ...
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... Note 6: Don't apply inverted phase signal externally when DQ pin is in output mode. 28 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 4,194,304-BIT (262,144-WORD BY 16-BIT) CMOS SRAM (LB ( (UB) su (Note4 (D) ( DATA IN STABLE MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) (W) rec (Note3) (Note3) (Note3) Apr. 1999 , Rev.1.7 ...
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... DATA IN STABLE (CE2 (A) su (Note4 ( DATA IN STABLE MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) t (W) (Note3) rec (Note3) (Note3) (D) (Note3) t (W) rec (Note3) (Note3) (D) Apr. 1999 , Rev.1.7 ...
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... S-Vcc=3.0V < S-CE2 0.2V other inputs=0~3V Test conditions 2. (PD) > S-LB#,S-UB# (S-Vcc) - 0. (PD) > S-CE1# (S-Vcc) - 0.2V = 2.7V < S-CE2 0. (PD) MITSUBISHI LSIs M6MGB/T166S4BWG 3.3V-ONLY FLASH MEMORY & Stacked-CSP (Chip Scale Package) Limits Min Typ 2.0 2.0 2.0 + +40 ~ +70 C + +25 C Typical value is for Ta=25 C Limits Min ...