HY29F400ABT-70 Hynix Semiconductor, HY29F400ABT-70 Datasheet

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HY29F400ABT-70

Manufacturer Part Number
HY29F400ABT-70
Description
HY29F400ABT-704 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet
KEY FEATURES
GENERAL DESCRIPTION
The HY29F400A is a 4 Megabit, 5 volt only CMOS
Flash memory organized as 524,288 (512K) bytes
or 262,144 (256K) words. The device is offered in
industry-standard 44-pin PSOP and 48-pin TSOP
packages.
The HY29F400A can be programmed and erased
in-system with a single 5-volt V
generated and regulated voltages are provided for
program and erase operations, so that the device
does not require a high voltage power supply to
perform those functions. The device can also be
programmed in standard EPROM programmers.
Access times as fast as 55 ns over the full operat-
ing voltage range of 5.0 volts ± 10% are offered
for timing compatibility with the zero wait state re-
quirements of high speed microprocessors. A 55
ns version operating over 5.0 volts ± 5% is also
Preliminary
Revision 1.0, January 2002
5 Volt Read, Program, and Erase
– Minimizes system-level power requirements
High Performance
– Access times as fast as 50 ns
– 20 mA typical active read current in byte
– 30 mA typical program/erase current
– 5 µA maximum CMOS standby current
Compatible with JEDEC Standards
– Package, pinout and command-set
– Provides superior inadvertent write
Sector Erase Architecture
– Boot sector architecture with top and
– One 16 Kbyte, two 8 Kbyte, one 32 Kbyte
– One 8 Kword, two 4 Kword, one 16 Kword
– A command can erase any combination of
– Supports full chip erase
Erase Suspend/Resume
– Temporarily suspends a sector erase
Low Power Consumption
mode, 28 mA typical in word mode
compatible with the single-supply Flash
device standard
protection
bottom boot block options available
and seven 64 Kbyte sectors in byte mode
and seven 32 Kword sectors in word mode
sectors
operation to allow data to be read from, or
programmed into, any sector not being
erased
CC
supply. Internally
4 Megabit (512Kx8/256Kx16) 5 Volt-only Flash Memory
LOGIC DIAGRAM
Sector Protection
– Any combination of sectors may be locked
Temporary Sector Unprotect
– Allows changes in locked sectors
Internal Erase Algorithm
– Automatically erases a sector, any
Internal Programming Algorithm
– Automatically programs and verifies data
Fast Program and Erase Times
– Byte programming time: 7 µs typical
– Sector erase time: 1.0 sec typical
– Chip erase time: 11 sec typical
Data# Polling and Toggle Status Bits
– Provide software confirmation of
Ready/Busy# Output (RY/BY#)
– Provides hardware confirmation of
100,000 Program/Erase Cycles Minimum
Space Efficient Packaging
– Available in industry-standard 44-pin
18
to prevent program or erase operations
within those sectors
(requires high voltage on RESET# pin)
combination of sectors, or the entire chip
at a specified address
completion of program or erase
operations
completion of program and erase
operations
PSOP and 48-pin TSOP and reverse
TSOP packages
A[17:0]
CE#
OE#
WE#
RESET#
BYTE#
DQ[15]/A-1
DQ[14:8]
RY/BY#
DQ[7:0]
HY29F400A
8
7

Related parts for HY29F400ABT-70

HY29F400ABT-70 Summary of contents

Page 1

KEY FEATURES 5 Volt Read, Program, and Erase – Minimizes system-level power requirements High Performance – Access times as fast Low Power Consumption – typical active read current in byte mode typical in ...

Page 2

HY29F400A available. To eliminate bus contention, the HY29F400A has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device is compatible with the JEDEC single power-supply Flash command set standard. Com- mands are written to the ...

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PIN CONFIGURATIONS RESET# RY/BY WE# A17 A10 A11 A12 A13 A14 A1 10 ...

Page 4

HY29F400A SIGNAL DESCRIPTIONS ...

Page 5

MEMORY ARRAY ORGANIZATION The 4 Mbit Flash memory array is organized into 11 blocks called sectors (S0, S1 S10). A sector is the smallest unit that can be erased and which can be protected to prevent ...

Page 6

HY29F400A Table 2. HY29F400A Normal Bus Operations ...

Page 7

Table 3. HY29F400A Bus Operations Requiring High Voltage ...

Page 8

HY29F400A If RESET# is asserted during a program or erase operation, the RY/BY# pin remains Low (busy) until the internal reset operation is complete, which re- quires a time of t (during Automatic Algo- READY rithms). The system can thus ...

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The procedure for sector unprotection is illustrated in the flow chart in Figure 2, and timing specifica- tions and waveforms are given at the end of this document. Note that to unprotect any sector, all unprotected sectors must first be ...

Page 10

HY29F400A Electronic ID Mode Operation The Electronic ID mode provides manufacturer and device identification and sector protection verifi- cation through identifier codes output on DQ[7:0] or DQ[15:0]. This mode is intended primarily for programming equipment to automatically match a device ...

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Rev. 1.0/Jan Electronic 7 HY29F400A 11 ...

Page 12

HY29F400A In a Sector Erase or Chip Erase command se- quence, the Read/Reset command may be written at any time before erasing actually be- gins, including, for the Sector Erase command, between the cycles that specify the sectors to be ...

Page 13

Commands written to the device during execution of the Automatic Erase algorithm are ignored. Note that a hardware reset immediately terminates the erase operation. To ensure data integrity, the aborted Chip Erase command sequence should be reissued once the reset ...

Page 14

HY29F400A Suspend command is valid. All other commands are ignored. As for the Chip Erase command, note that a hard- ware reset immediately terminates the erase op- eration. To ensure data integrity, the aborted Sec- tor Erase command sequence should ...

Page 15

After an erase-suspended program operation is complete, the host can initiate another program- ming operation (or read operation) within non-sus- pended sectors. The host can determine the sta- tus of a program operation during the erase-sus- pended state just as ...

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HY29F400A Table 6. Write and Erase Operation Status Summary ...

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DQ[6] to toggle. DQ[6] stops toggling when the erase operation is complete or when the device is placed in the Erase Suspend mode. The host may use DQ[2] to determine which sectors are erasing or erase-suspended (see below). After an ...

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HY29F400A START Read DQ[7:0] at Valid Address (Note 1) Read DQ[7:0] at Valid Address (Note 1) YES DQ[6] Toggled? NO (Note 4) NO (Note 3) PROGRAM/ERASE COMPLETE Notes: 1. During programming, the program address. During sector erase, an address within ...

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Power-Up Write Inhibit If WE and OE up, the device does not accept commands on the rising edge of WE#. The internal state machine is automatically reset to the Read mode on power- ...

Page 20

HY29F400A ABSOLUTE MAXIMUM RATINGS ...

Page 21

DC CHARACTERISTICS TTL/NMOS Compatible ...

Page 22

HY29F400A DC CHARACTERISTICS CMOS Compatible ...

Page 23

KEY TO SWITCHING WAVEFORMS TEST CONDITIONS DEVICE UNDER TEST 6 KOhm Figure 11. Test Setup 3.0 V Input 1.5 V 0.0 V 2.4 V Input 0.45 V Figure 12. Input ...

Page 24

HY29F400A AC CHARACTERISTICS Read Operations ...

Page 25

AC CHARACTERISTICS Hardware Reset (RESET ...

Page 26

HY29F400A AC CHARACTERISTICS Word/Byte Configuration (BYTE ...

Page 27

AC CHARACTERISTICS Program and Erase Operations ...

Page 28

HY29F400A AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 0x555 CE# t GHWL OE WE Data 0xA0 RY/BY VCS Notes Program Address Program ...

Page 29

AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 0x2AA CE# t GHWL OE WE Data 0x55 RY/BY VCS Notes =Sector Address (for sector erase ...

Page 30

HY29F400A AC CHARACTERISTICS t Addresses ACC CH CE OE# t OEH WE DQ[7] DQ[6:0] t BUSY RY/BY# Notes Valid Address for reading Data# Polling status data (see Write Operation Status ...

Page 31

AC CHARACTERISTICS Enter Automatic Erase WE# DQ[6] DQ[2] Notes: 1. The system may use CE# or OE# to toggle DQ[2] and DQ[6]. DQ[2] toggles only when read at an address within an erase-suspended sector. Sector Protect and Unprotect, Temporary Sector ...

Page 32

HY29F400A AC CHARACTERISTICS Sector Protect Cycle A[17:12] A[0] A[1] A[6] t VLHT OE# t OESP t VLHT WE# CE# Data RESET WPP1 ST Figure ...

Page 33

AC CHARACTERISTICS Sector Unprotect Cycle A[17:12] A[0] A[ VLHT V ID OE# t OESP V ID CE# t CSP WE# Data RESET Rev. 1.0/Jan VLHT t WPP2 ...

Page 34

HY29F400A AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations ...

Page 35

AC CHARACTERISTICS 0x555 for Program 0x2AA for Erase Addresses t WC WE# t GHEL OE CE Data 0xA0 for Program 0x55 for Erase RY/BY RESET# Notes program address, PD ...

Page 36

HY29F400A Latchup Characteristics ...

Page 37

PACKAGE DRAWINGS Physical Dimensions TSOP48 - 48-pin Thin Small Outline Package (measurements in millimeters) Pin 1.20 MAX 0.25MM (0.0098") BSC PSOP44 - 44-pin Plastic Small Outline Package (measurements in millimeters 1.27 NOM. 28.00 28.40 ...

Page 38

HY29F400A ORDERING INFORMATION Hynix products are available in several speeds, packages and operating temperature ranges. The ordering part number is formed by combining a number of fields, as indicated below. Refer to the ‘Valid Combinations’ table, which lists the configurations ...

Page 39

... Hynix Semiconductor America. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Hynix Semiconductor Inc. or Hynix Semiconductor America (collec- tively “Hynix”). The information in this document is subject to change without notice ...

Page 40

... Flash Memory Business Unit HQ Hynix Semiconductor Inc. 3101 North First Street San Jose, CA 95134 Telephone: (408) 232-8800 Fax: (408) 232-8805 http://www.us.hynix.com USA Rev. 1.0/Jan. 02 ...

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