CY7C1021CV26-15ZE Cypress Semiconductor Corporation., CY7C1021CV26-15ZE Datasheet

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CY7C1021CV26-15ZE

Manufacturer Part Number
CY7C1021CV26-15ZE
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Cypress Semiconductor Corporation
Document #: 38-05589 Rev. **
Features
Functional Description
The CY7C1021CV26 is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Selection Guide
Note:
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
• Temperature Range
• High speed
• Optimized voltage range: 2.5V–2.7V
• Low active power: 360 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• CMOS for optimum speed/power
• Package offered: 44-pin TSOP II
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
— Automotive: –40°C to 125°C
— t
AA
Logic Block Diagram
= 15 ns
A
A
A
A
A
A
A
A
4
3
2
1
0
7
6
5
DATA IN DRIVERS
COLUMN DECODER
512 X 2048
RAM Array
64K x 16
3901 North First Street
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the end of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a Write operation
(CE LOW, and WE LOW).
1-Mbit (64K x 16) Static RAM
15
). If Byte High Enable (BHE) is LOW, then data
San Jose
9
through I/O
1
to I/O
,
CC
CA 95134
1
= V
through I/O
CY7C1021CV26-15
8
I/O
I/O
. If Byte High Enable (BHE) is
CC(typ.)
16
0
) is written into the location
1
9
BHE
WE
CE
OE
BLE
through A
–I/O
–I/O
CY7C1021CV26
, T
Revised June 22, 2004
15
80
10
8
16
A
= 25°C.
16
) are placed in a
1
15
through I/O
).
408-943-2600
9
to I/O
16
. See
8
), is
0

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CY7C1021CV26-15ZE Summary of contents

Page 1

... Independent control of upper and lower bits • CMOS for optimum speed/power • Package offered: 44-pin TSOP II Functional Description The CY7C1021CV26 is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. ...

Page 2

... Output Enable, active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins. Ground for the device. Should be connected to ground of the system. Power Supply inputs to the device. CY7C1021CV26 –I/O , BHE controls 8 1 ...

Page 3

... IN Test Conditions T = 25° MHz 2.6V CC Test Conditions Still Air, soldered × 4.5 inch, two-layer [5] printed circuit board [5] CY7C1021CV26 [3] ................................ –0. Ambient Temperature –40°C to +125°C CY7C1021CV26-15 Min. Max. 2.3 0.4 2 0.3 CC –0.3 0.8 –3 +3 –3 +3 –300 80 15 MAX 10 – 0.3V, Max ...

Page 4

... Description [8] [8, 9] [8] [ less than less than t HZCE LZCE HZOE LZOE CY7C1021CV26 ALL INPUT PULSES 90% 90% 10% 10% Fall Time: 1 V/ns (b) R2 351Ω CY7C1021CV26-15 Min. Max and t is less than t for any given device ...

Page 5

... Address valid prior to or coincident with CE transition LOW. Document #: 38-05589 Rev. ** [7] (continued) Description [8] [ OHA [13, 14 ACE t DOE t LZOE t DBE t LZBE 50 CY7C1021CV26 CY7C1021CV26-15 Min. Max DATA VALID t HZOE t HZCE t HZBE IMPEDANCE DATA VALID t PD 50% Unit HIGH I ICC CC I ISB SB Page ...

Page 6

... Data I/O is high-impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05589 Rev. ** [15, 16 SCE PWE PWE t SCE . IH CY7C1021CV26 Page ...

Page 7

... Data Data High High High-Z Ordering Information Speed (ns) Ordering Code 15 CY7C1021CV26-15ZE Document #: 38-05589 Rev SCE PWE HZWE I/O –I/O I/O –I High-Z Power-down Data Out Read – All bits High-Z Read – Lower bits only Data Out Read – ...

Page 8

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 44-pin TSOP II Z44 CY7C1021CV26 51-85087-*A Page ...

Page 9

... Document History Page Document Title: CY7C1021CV26 1-Mbit (64K x 16) Static RAM Document Number: 38-05589 Issue REV. ECN NO. Date ** 238454 See ECN Document #: 38-05589 Rev. ** Orig. of Change Description of Change RKF New datasheet for Automotive CY7C1021CV26 Page ...

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