UPD78C12ACW NEC, UPD78C12ACW Datasheet

no-image

UPD78C12ACW

Manufacturer Part Number
UPD78C12ACW
Description
Manufacturer
NEC
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78C12ACW-F12
Manufacturer:
NEC
Quantity:
156
Part Number:
UPD78C12ACW-F69
Manufacturer:
MOSYS
Quantity:
118
Part Number:
UPD78C12ACW-F69
Manufacturer:
NEC
Quantity:
1 000
Part Number:
UPD78C12ACW-F69
Manufacturer:
NEC
Quantity:
20 000
Document No. IC-2678C
Date Published February 1995 P
Printed in Japan
(O. D. No. IC-7769E)
DESCRIPTION
a multi-function timer/event counter, and a general-purpose serial interface into a single chip, then expand the
memory (ROM/RAM) up to 60K bytes externally. The PD78C10A is a ROM-less product of the PD78C11A, and can
directly address the external memory up to 64k bytes. The PD78C12A is a product which has more built-in ROM
capacity than the PD78C11A, and its memory (ROM/RAM) can be externally extended up to 56K bytes. The
construction. Also, they can hold data with low power consumption by using standby function.
system development, early start-up and short-run multiple-device production of application sets, are available.
FEATURES
Caution
PD78C10A,
Abundant 159 types of instructions : 87AD series instruction set, multiplication/division instructions,
Instruction cycle : 0.8 s (at 15 MHz operation)
On-chip ROM : 4096W
On-chip RAM : 256W
High-precision 8-bit A/D converter : 8 analog inputs
General-purpose serial interface : Asynchronous, synchronous, I/O interface mode
Multi-function 16-bit timer/event counter
Two 8-bit timers
I/O lines : 32 ( PD78C10A), 44 ( PD78C11A, 78C12A)
Interrupt function (external - 3, internal - 8) : Non-maskable interrupt
Standby function : HALT mode, hardware/software STOP mode
Zero-cross detection function : (2 inputs)
On-chip pull-up resistor (port A, B, C: PD78C11A, 78C12A only) by mask option
The PD78C11A is a CMOS 8-bit microprocessor which can integrate 16-bit ALU, ROM, RAM, an A/D converter,
On-chip PROM products, PD78CP14 and PD78CP18 which are ideal for evaluation or preproduction use during
The PD78C10A does not hava a mask option.
8-BIT SINGLE-CHIP MICROCOMPUTER (WITH A/D CONVERTER)
PD78C11A, and
Non ( PD78C10A)
8
8 ( PD78C11A), 8192W
The information in this document is subject to change without notice.
PD78C10A, 78C11A, 78C12A
PD78C12A operated at low power consumption, because they have a CMOS
16-bit operation instructions
The mark
DATA SHEET
shows major revised points.
DATA SHEET
8 ( PD78C12A)
MOS INTEGRATED CIRCUIT
1, maskable interrupt
10
©
1990

Related parts for UPD78C12ACW

UPD78C12ACW Summary of contents

Page 1

SINGLE-CHIP MICROCOMPUTER (WITH A/D CONVERTER) DESCRIPTION The PD78C11A is a CMOS 8-bit microprocessor which can integrate 16-bit ALU, ROM, RAM, an A/D converter, a multi-function timer/event counter, and a general-purpose serial interface into a single chip, then expand the ...

Page 2

ORDERING INFORMATION Ordering Code PD78C10ACW 64-pin plastic shrink DIP (750 mil) PD78C10AGF-3BE 64-pin plastic QFP (14 PD78C10AGQ-36 64-pin plastic QUIP PD78C10AL 68-pin plastic QFJ ( PD78C11ACW- 64-pin plastic shirink DIP (750 mil) PD78C11AGF- -3BE 64-pin plastic QFP (14 PD78C11AGQ- -36 ...

Page 3

PIN CONFIGURATION (TOP VIEW) For PD78C10ACW, PD78C10AGQ-36, PD78C12AGQ- -36/37. For PD78C10AGF-3BE, PD78C11AGF PD3 52 PD4 53 PD5 54 PD6 55 PD7 56 STOP PA0 59 PA1 60 PA2 61 PA3 62 PA4 63 PA5 ...

Page 4

For PD78C10AL, PD78C11AL- 9 PA7 10 11 PB0 PB1 12 13 PB2 PB3 14 15 PB4 PB5 16 PB6 17 PB7 18 PC0 PC1 PC2/SCK 21 PC3/INT2 PC4/TO 24 PC5/CI 25 ...

Page 5

X1 OSC X2 PC0 PC1/R D SERIAL I/O X PC2/SCK NMI 8 INT1 INT. CONTROL 4 PC3/INT2/TI TIMER 8 PC4/TO 8 PC5/CI TIMER/ PC6/CO0 EVENT COUNTER 8 PC7/CO1 AN7 AREF CONVERTER AV DD ...

Page 6

... PIN FUNCTIONS ..................................................................................................................................... 1.1 LIST OF PIN FUNCTION ................................................................................................................................ 1.2 PIN INPUT/OUTPUT CIRCUITS .................................................................................................................... 1.3 PIN MASK OPTIONS ...................................................................................................................................... 14 1.4 RECOMMENDED CONNECTION OF UNUSED PINS .................................................................................. 14 2. DIFFERENCES BETWEEN PD78C10A AND PD78C11A, 78C12A ................................................... 15 3. RESET OPERATIONS ............................................................................................................................. 17 4. INSTRUCTION SET ................................................................................................................................. 20 4.1 IDENTIFIER/DESCRIPTION OF OPERAND ................................................................................................... 20 4.2 SYMBOL DESCRIPTION OF OPERATION CODE ......................................................................................... 21 4.3 INSTRUCTION EXECUTION TIME ................................................................................................................ 22 5. LIST OF MODE REGISTERS .................................................................................................................. 34 6 ...

Page 7

PIN FUNCTIONS 1.1 LIST OF PIN FUNCTION (1/2) Pin Name I/O PA7 to PA0 Input/Output 8-bit input-output port, which can specify input/output bit-wise. (Port A) PB7 to PB0 Input/Output 8-bit input-output port, which can specify input/output bit-wise. (Port B) ...

Page 8

... GND pin for A/D converter. (Analog Crystal connection pins for system clock oscillation. X1 should be input when a clock is X1, X2 supplied from outside. Input the clock of the reverse phase X2. (Crystal) RESET Input Low-level active system reset input. (Reset) STOP Control signal input pin in hardware STOP mode ...

Page 9

PIN INPUT/OUTPUT CIRCUITS Tables 1-1 and 1-2, and figures (1) to (15) show input- output circuits of each pin in a partially simplified form. Pin Name PA7 to PA0 PB7 to PB0 PC1 to PC0 PC2/SCK PC3/INT2 PC7 to ...

Page 10

Type 1 (2) Type 2 (3) Type 4 output data output disable (4) Type 4-A output data output disable PD78C10A,78C11A,78C12A DD P-ch OUT N- P-ch OUT N-ch ...

Page 11

Type 5 output data output disable (6) Type 5-A output data output disable (7) Type (8) Type 8 output disable MCC Type4 Type1 Type4-A Type1 AV DD P-ch + N-ch - Sampling ...

Page 12

Type 8-A output disable (10) Type 9 IN (11) Type 10 output disable 12 output data Type5-A Type2 MCC self bias enable Type1 output data Type5 self bias enable Type9 MCC PD78C10A,78C11A,78C12A IN/OUT data IN/OUT ...

Page 13

Type 10-A (13) Type 11 output data (14) Type 12 IN (15) Type 13 IN STOP Mode output data output disable Type5-A self bias enable Type9 MCC N-ch Type1 Type7 Type2 Edge Detector Type1 AV SS PD78C10A,78C11A,78C12A IN/OUT IN/OUT ...

Page 14

... Pin Name PA7 to PA0 PB7 to PB0 PC7 to PC0 Cautions 1. Zero-cross function can not be operated normally if pull-up resistor is incorporated in PC3. 2. PD78C10A has no mask option. 1.4 RECOMMENDED CONNECTION OF UNUSED PINS Pin PA7 to PA0 PB7 to PB0 PC7 to PC0 PD7 to PD0 PF7 to PF0 RD WR ALE ...

Page 15

DIFFERENCES BETWEEN PD78C10A AND PD78C11A, 78C12A The difference between the PD78C10A and PD78C11A, 78C12A is whether or not there is an on-chip mask programmable ROM. The memory map differs accordingly as described below. (1) PD78C10A Since the PD78C10A does ...

Page 16

Bytes Access 0000H External Memory 0FFFH Not Used FF00H On-Chip RAM FFFFH MODE0 = 0 MODE1 = 0 16 PD78C10A,78C11A,78C12A Fig. 2-1 PD78C10A Memory Map 16K Bytes Access External Memory 3FFFH Not Used On-Chip RAM MODE0 = 1 MODE1 ...

Page 17

... SB flag of test flag When RESET input becomes high, the reset status is released. Then, execution of the program is started from 0000H. The contents of various kinds of registers must be initialized or re-initialized in the program, if necessary. Table 3-1 shows the state of each hardware after reset. Table 3-2 shows the state of each pin after reset. ...

Page 18

Table 3-1 State of Each Hardware after Reset Hardware Power-on reset Writing Reset input Internal data by CPU during normal memory operation Operation other than writing by CPU Reset input in standby mode Expansion accumulator (EA, EA') Accumulator (A, A') ...

Page 19

Table 3-2 State of Each Pin after Reset State after Reset Pin WR RD High-impedance ALE All ports (PA, PB, PC, PD, PF) PD78C10A,78C11A,78C12A 19 ...

Page 20

INSTRUCTION SET 4.1 IDENTIFIER/DESCRIPTION OF OPERAND Identifier EAH, EAL PA, PB, PC, PD, PF, MKH, MKL, ANM, SMH, ...

Page 21

SYMBOL DESCRIPTION OF OPERATION CODE reg ...

Page 22

INSTRUCTION EXECUTION TIME 1 state shown here is composed of 3 clock cycles. When a clock cycle of 15 MHz is used, the execution time should be 200 1/15 s). In this case, the 4-state instruction ...

Page 23

Mnemonic Operand ...

Page 24

Mnemonic Operand B1 sr3 DMOV EA, sr4 SBCD word SDED word word SHLD SSPD word STEAX rpa3 ...

Page 25

Mnemonic Operand ADDNC SUB SBB SUBNB ANA ORA r, ...

Page 26

Mnemonic Operand EQA r, A ONA A, r OFFA A, r rpa ADDX ADCX rpa ADDNCX rpa SUBX rpa SBBX rpa ...

Page 27

Mnemonic Operand byte ADI r, byte sr2, byte byte ...

Page 28

Mnemonic Operand B1 ANI sr2, byte byte ORI r, byte sr2, byte 0 1 ...

Page 29

Mnemonic Operand byte ONI r, byte sr2, byte byte ...

Page 30

Mnemonic Operand OFFAW * ANIW wa, byte ORIW wa, byte wa, byte ...

Page 31

Mnemonic Operand B1 DGT EA, rp3 DLT EA, rp3 DNE EA, rp3 DEQ EA, rp3 1 1 ...

Page 32

Mnemonic Operand B1 RLD RRD RLL r2 r2 RLR SLL r2 SLR r2 SLLC r2 SLRC r2 DRLL EA DRLR EA DSLL EA DSLR EA * JMP word ...

Page 33

Mnemonic Operand B1 ta CALT word SOFTI RET RETS ...

Page 34

LIST OF MODE REGISTERS Read/ Name of Mode Registers Write MA MODE A register MB MODE B register MODE CONTROL MCC C register MC MODE C register MEMORY MAPPING MM register MF MODE F register TMM Timer mode register ...

Page 35

ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (T A PARAMETER SYMBOL V DD Power supply voltage Input voltage V I Output voltage V O Output current low Output current high OH A/D converter reference ...

Page 36

OSCILLATOR CHARACTERISTICS (T V RESONATOR RECOMMENDED CIRCUIT X1 X2 Ceramic*1 or crystal resonator External clock HCMOS Inverter Cautions 1. Place oscillator circuit as close as possible to X1, X2 pins. 2. Ensure that no other signal lines ...

Page 37

CAPACITANCE ( PARAMETER SYMBOL Input capacitance C I Output capacitance C O Input-output capacitance TEST CONDITIONS MIN MHz C Unmeasured pins returned to ...

Page 38

DC CHARACTERISTICS (T = – PARAMETER SYMBOL All except RESET, STOP, NMI, V IL1 SCK, INT1, TI, AN4 to AN7 Input voltage low RESET, STOP, NMI, SCK, INT1, V IL2 TI, AN4 to AN7 All ...

Page 39

AC CHARACTERISTICS (T = – Read/write Operation: PARAMETER SYMBOL X1 input cycle time t CYC Address setup time (to ALE ) t AL Address hold time (from ALE ) delay time from ...

Page 40

Serial Operation : PARAMETER SYMBOL SCK cycle time t CYK SCK low level width t KKL SCK high level width t KKH R D setup time (to SCK ) t X RXK R D hold time (from SCK ) t ...

Page 41

A/D CONVERTER CHARACTERISTICS (T PARAMETER SYMBOL Resolution 3.4 V 4.0 V Absolute accuracy – Conversion time t CONV 110 Sampling time t SAMP 110 ns Analog input ...

Page 42

AC Characteristics Expression CYC PARAMETER t 2T – 100 – – 100 – 220 – 200 LDR t 4T – 150 – ...

Page 43

Timing Waveform Read operation t CYC X1 PF7 - 0 Address (Lower) PD7 - ALE MODE1 (M1)* MODE0 (IO/M)*2 * ...

Page 44

Serial Operation SCK Timer Input Timing TI Timer/Event Counter Input Timing Event Counter Mode CI Pulse Width Test Mode CYK t t KKL KKH t KTX t RXK t KRX t ...

Page 45

Interrupt Input Timing NMI INT1 INT2 Reset Input Timing RESET 0.8 V External Clock Timing 0 0 NIH NIL t t I1L I1H t t I2H I2L t t RSH RSL DD ...

Page 46

DATA MEMORY STOP MODE LOW POWER SUPPLY VOLTAGE DATA RETENTION CHARACTERISTICS (T = – PARAMETER SYMBOL Data retention power V DDDR supply voltage V DDDR Data retention power I DDDR supply current V DDDR V rise/fall ...

Page 47

CHARACTERISTIC CURVES (REFERENCE VALUES PD78C10A,78C11A,78C12A DD1 DD2 ˚ (TYP.) DD1 I (TYP.) DD2 4.5 5.0 5.5 Power Supply ...

Page 48

Power Supply Voltage – Output Voltage High V 48 PD78C10A,78C11A,78C12A ˚ TYP. 0.2 0.3 0.4 Output Voltage ...

Page 49

DDDR Data Retention Power Supply Voltage V PD78C10A,78C11A,78C12A DDDR ( ˚C) A TYP [V] DDDR 49 ...

Page 50

DIFFERENCES IN 87AD SERIES PRODUCTS (1/2) Product Name Item Number of instructions On-chip ROM On-chip RAM Nnmber of special registers Operating frequency MHz Power supply voltage Operating temperature range –10 to +70 C Thirty-two bytes of ...

Page 51

PD78C10A, 78C11A, PD78CP14 78C12A 159 kinds (STOP instruction added) ROM less ( PD78C10A bits ( PD78C11A) 16K 8 bits (PROM bits ( PD78C12A) 256 8 bits 28 (ZCM register added MHz 6 to ...

Page 52

... T DW Hardware STOP mode restrictions Asyncronous mode restrictions during external SCK input. Package Pin connection* PD7810, 7811, 78C10 and 78C11 are maintenance products. 4. For PD7810, 7810H, 78C10 and 78C10A. 5. For the asyncronous mode with clock rate x1, syncronous mode, and I/O interface mode ...

Page 53

PD78C10A, 78C11A, PD78CP14 78C12A High-impedance Only PD78C11A, 78C12A possible (ports CMOS 50 A MAX MAX MAX MAX. ...

Page 54

PACKAGE INFORMATION 64 PIN PLASTIC SHRINK DIP (750 mil NOTE 1) Each lead centerline is located within 0.17 mm (0.007 inch) of its true position (T.P.) at maximum material condition. 2) Item "K" ...

Page 55

PD78C10A,78C11A,78C12A 55 ...

Page 56

PD78C10A,78C11A,78C12A ...

Page 57

PLASTIC QFP (14 20) (UNIT: mm NOTE Each lead centerline is located within 0.20 mm (0.008 inch) of its true position (T.P.) at maximum material condition. PD78C10A,78C11A,78C12A ...

Page 58

... ES 64PIN CERAMIC QFP (REFERENCE DRAWING) (UNIT: mm) 58 PD78C10A,78C11A,78C12A Cautions 1. The metal cap is connected to pin 26 and is V (GND) level The bottom leads are tilted. 3. Since cutting of the end of the leads is no process-controlled, the lead length is unspecified. ...

Page 59

PLASTIC QFJ ( 950 mil) (UNIT: mm NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. PD78C10A,78C11A,78C12A ...

Page 60

RECOMMENDED SOLDERING CONDITIONS The PD78C10A, 78C11A, and 78C12A should be soldered and mounted under the conditions recommended in the table below. For detail of recommended soldering conditions, refer to the information document "Semiconductor Device Mounting Technology Manual" (IEI-1207). For ...

Page 61

Table 10-2 Inserted Type Soldering Conditions (1) PD78C10ACW : 64-pin plastic shrink DIP (750 mil) PD78C11ACW- : 64-pin plastic shrink DIP (750 mil) PD78C12ACW- : 64-pin plastic shrink DIP (750 mil) PD78C10AGQ-36 : 64-pin plastic QUIP PD78C11AGQ- -36 : 64-pin ...

Page 62

... For PD78CP14GF-3BE, 78CP18GF-3BE PA-78CP14GQ For PD78CP14G-36, 78CP14R, 78CP18GQ-36 PA-78CP14KB For PD78CP14KB, 78CP18KB PA-78CP14L For PD78CP14L Connected PG-1500 to a host machine by using serial and parallel interface, to control the PG- 1500 on a host machine. Host Machine PG-1500 controller PC-9800 series IBM PC/AT * Ver. 5.00/5.00A has a task swap function, but this function cannot be used with this software. ...

Page 63

... Used in combination with the IE-78C11-M. 64-pin LCC socket. Can be used as a substitute for 64-pin plastic QFP products with window in EV-9200G-64 combination with the PD78CP14KB/78CP18KB. Connects the IE-78C11-M to host machine by using the RS-232-C, then controls the IE-78C11-M on host machine. Host Machine IE-78C11-M ...

Page 64

PD78C10A,78C11A,78C12A ...

Page 65

... Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS device behave differently than Bipolar or NMOS devices ...

Page 66

... The export of these products from Japan is regulated by the Japanese government. The export of some or all of these products may be prohibited without governmental license. To export or re-export some or all of these products from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. The customer must judge : ...

Related keywords