M37516 MITSUBISHI, M37516 Datasheet
M37516
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M37516 Summary of contents
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... May '99 1. Type No. 2. Function 3. Application 4. Outline 4.1 Name 4.2 Drawing No. 5. Circuit Drawing No. 6. Pin Configuration 7. Related Documents M37516M6-XXXHP INTEGRATED CIRCUIT M37516M6-XXXHP Single chip 8-bit microcomputer Office automation,Household products etc. 48P6D / 48P6Q (48pin 0.5mm pitch Plastic-molded LQFP) See Page 2 GNOK-M37516M6-XXXHP-50 PA (MSETSU 2) 1/54 GE ...
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... DESCRIPTION The M37516M6-XXXHP is the 8-bit microcomputer based on the 740 family core technology. The M37516M6-XXXHP is designed for the household products and office automation equipment and includes serial I/O functions, 2 8-bit timer, A-D converter, and I C-bus interface. FEATURES Basic machine-language instructions ...................................... 71 Minimum instruction execution time ................................... 0.5us ...
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... FUNCTIONAL BLOCK Fig. 2 Functional block diagram M37516M6-XXXHP GNOK-M37516M6-XXXHP-50 PA (MSETSU 2) 3/54 GE ...
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... CMOS I/O port with the same function as port P0. •CMOS compatible input level. •CMOS 3-state output structure. •8-bit CMOS I/O port with the same function as port P0. •CMOS compatible input level. •CMOS 3-state output structure. GNOK-M37516M6-XXXHP-50 Function except a port function and X pins to set IN OUT ...
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... FUNCTIONAL DESCRIPTION CENTRAL PROCESSING UNIT (CPU) The M37516M6-XXXHP uses the standard 740 Family instruction set. Refer to the table of 740 Family addressing modes and ma- chine instructions or the 740 Family Software Manual for details on the instruction set. Machine-resident 740 Family instructions are as follows: The FST and SLW instructions cannot be used ...
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... Access to this area with only 2 bytes is possible in the special page addressing mode. 0000 16 SFR area 0040 16 0100 16 023F 16 Reserved area 0440 16 Not used A000 16 Reserved ROM area (128 bytes) A080 16 FF00 16 FFDC 16 Interrupt vector area FFFE 16 Reserved ROM area FFFF 16 GNOK-M37516M6-XXXHP-50 Zero page Special page PA (MSETSU 2) 6/54 GE ...
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... Watchdog timer control register (WDTCON) 0039 16 Interrupt edge selection register (INTEDGE) 003A 16 CPU mode register (CPUM) 003B 16 Interrupt request register 1 (IREQ1) 003C 16 Interrupt request register 2 (IREQ2) 003D 16 Interrupt control register 1 (ICON1) 003E 16 Interrupt control register 2 (ICON2) 003F 16 GNOK-M37516M6-XXXHP-50 PA (MSETSU 2) 7/54 GE ...
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... Serial I/O1 function I/O Timer X function I/O A-D conversion input Timer Y function I/O CMOS compatible input level External interrupt input CMOS 3-state output External interrupt input S output CMP2 External interrupt input PWM output GNOK-M37516M6-XXXHP-50 Related SFRs Ref.No. (1) (2) Serial I/O2 control (3) register (4) (5) (6) CPU mode register (7) (8) ...
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... Port P0 3 Data bus (6) Port P2 0 Port X Data bus (8) Port C-BUS interface enable bit SDA/SCL pin selection bit Data bus GNOK-M37516M6-XXXHP-50 Direction register Port latch Serial I/O2 output S output enable bit RDY2 Direction register Port latch Serial I/O2 ready output switch bit ...
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... Serial I/O1 enable bit Data bus SCL input Serial I/O1 clock output (14) Port P3 Data bus CNTR interrupt 0 input (16) Port P4 Data bus CNTR interrupt input 1 GNOK-M37516M6-XXXHP-50 4 Direction register Port latch SDA input SDA output Serial I/O1 input 6 Direction register Port latch External clock input –P3 0 ...
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... Port P4 3 Serial I/O2 I/O comparison signal control bit Direction register Data bus Port latch Serial I/O2 I/O comparison signal output Interrupt input Fig. 8 Port block diagram (3) M37516M6-XXXHP (18) Port P4 PWM output enable bit Data bus GNOK-M37516M6-XXXHP-50 4 Direction register Port latch PWM output Interrupt input PA (MSETSU 2) GE 11/54 ...
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... Disable the interrupt 2. Change the interrupt edge selection register (SCL/SDA interrupt pin polarity selection bit for SCL/SDA; the timer XY mode register for CNTR 3. Clear the interrupt request bit to “0” 4. Accept the interrupt. GNOK-M37516M6-XXXHP-50 –INT , SCL set, the corresponding interrupt request ...
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... CNTR At detection of either rising or FFE0 16 16 falling edge of CNTR At completion of A-D conversion FFDE BRK instruction execution FFDC 16 16 GNOK-M37516M6-XXXHP-50 Remarks Non-maskable External interrupt input (active edge selectable) 0 External interrupt or S input (active edge selectable External interrupt (active edge selectable) ...
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... INT interrupt selected Serial I/O2 interrupt selected GNOK-M37516M6-XXXHP-50 Interrupt request b0 Interrupt request register 2 (IREQ2 : address 003D ) 16 Timer 1 interrupt request bit Timer 2 interrupt request bit Serial I/O1 reception interrupt request bit Serial I/O1 transmit interrupt request bit CNTR interrupt request bit ...
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... TIMERS The M37516M6-XXXHP has four timers: timer X, timer Y, timer 1, and timer 2. The division ratio of each timer or prescaler is given by 1/(n + 1), where n is the value in the corresponding timer or prescaler latch. All timers are count down. When the timer reaches “00 derflow occurs at the next count pulse and the corresponding timer latch is reloaded into the timer and the count is continued ...
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... Q bit T Toggle flip-flop Q R “0” Data bus Prescaler 12 latch (8) Timer 1 latch (8) Prescaler 12 (8) Timer 1 (8) GNOK-M37516M6-XXXHP-50 Timer X latch (8) To timer X interrupt Timer X (8) request bit To CNTR interrupt 0 request bit Timer X latch write pulse Pulse output mode Timer Y latch (8) To timer Y interrupt ...
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... TBE = 1 TSC = 0 GNOK-M37516M6-XXXHP- “1”. 16 Address 001A 16 Receive buffer full flag (RBF) Receive interrupt request (RI) 1/4 Transmit shift completion flag (TSC) Transmit interrupt request (TI) Transmit buffer empty flag (TBE) Address 0019 ...
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... Address 001C 16 ST/SP/PA generator 1/16 Transmit interrupt source selection bit Transmit shift register Transmit buffer register Address 0018 16 Data bus GNOK-M37516M6-XXXHP-50 Address 001A 16 1/16 UART control register Address 001B 16 Transmit shift completion flag (TSC) Transmit interrupt request (TI) Transmit buffer empty flag (TBE) Serial I/O1 status register ...
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... The baud rate generator divides the frequency of the count source by 1/(n + 1), where n is the value written to the baud rate genera- tor. Note When using the serial I/O1, clear the I to “0” or the SCL/SDA pin selection bit to “0”. GNOK-M37516M6-XXXHP- ...
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... D P-channel output disable bit (POFF CMOS output (in output mode) 1: N-channel open drain output (in output mode) Not used (return “1” when read) Fig. 18 Structure of serial I/O1 control registers M37516M6-XXXHP GNOK-M37516M6-XXXHP-50 b0 Serial I/O1 control register (SIOCON : address 001A ) 16 BRG count source selection bit (CSS f(X ...
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... OUT2 b7 pin is OUT2 in synchronization IN2 pin is OUT2 CMP2 interrupt request can 2 Fig. 19 Structure of Serial I/O2 control registers 1, 2 GNOK-M37516M6-XXXHP-50 b0 Serial I/O2 control register 1 (SIO2CON1 : address 0015 ) 16 Internal synchronous clock selection bit f(X )/8 (f(X )/8 in low-speed mode) IN CIN f(X ...
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... D Q "1" clock division (f(X IN COUT2 GNOK-M37516M6-XXXHP-50 Internal synchronous clock selection bit Data bus Serial I/O2 interrupt request Serial I/O2 interrupt request bit set ) in low-speed mode) can be selected CIN pin has high impedance after transfer completion. ...
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... S CMP2 S CLK2 S OUT2 S IN2 Fig output operation CMP2 M37516M6-XXXHP Judgement of I/O data comparison GNOK-M37516M6-XXXHP-50 PA (MSETSU 2) 23/54 GE ...
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... clock control register 2 Clock division 2 C-BUS interface 2 C components conveys a license under the Philips Standard Specification as defined by Philips. GNOK-M37516M6-XXXHP-50 2 C-BUS interface functions Item Function In conformity with Philips I standard: 10-bit addressing format Format 7-bit addressing format High-speed clock mode Standard clock mode ...
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... SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 SAD0 RWB Fig. 24 Structure are “1,” the data shift register consists of a 7-bit address reg- GNOK-M37516M6-XXXHP- address register (S0D: address 002C 16 Read/write bit Slave address 2 C address register PA (MSETSU 2) ...
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... Do not set CCR value regardless of Set 100 kHz (max.) in the standard clock mode and 400 kHz (max.) in the high-speed clock mode to the SCL frequency by setting the SCL frequency control bits CCR4 to CCR0. GNOK-M37516M6-XXXHP- clock control register ...
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... Multi-master 2 I C-BUS interface Fig. 26 SDA/SCL pin selection bit 2 C-BUS interface. When b7 TISS TSEL dis address regis- Fig. 27 Structure of I GNOK-M37516M6-XXXHP-50 TSEL SCL SCL SCL TSEL TSEL SDA SDA SDA TSEL control register 10 BIT ALS ES0 BC2 BC1 BC0 ...
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... C For the writing function to the BB flag, refer to the sections “START Condition Generating Method” and “STOP Condition Gen- erating Method” described later. GNOK-M37516M6-XXXHP- data shift register (ad- ). (This is the only condition which the prohibition start/stop condition ) ...
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... TRX BB PIN AL AAS AD0 LRB Note: These bits and flags can be read out, but cannot be written. Write “0” to these bits at writing. Fig. 28 Structure of I SCL PIN IICIRQ Fig. 29 Interrupt request signal generating timing GNOK-M37516M6-XXXHP- status register (S1 : address 002D ) 16 Last receive bit (Note Last bit = “ ...
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... SSC4 to SSC0. Do not set “0” odd number to SSC value. The value in parentheses is an example when the I STOP condition control register is set to “18 High-speed clock mode 3.0 us (12 cycles) 2.5 us (10 cycles) GNOK-M37516M6-XXXHP-50 SCL release time Setup Hold time time BB flag ...
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... R/W data agree, which are re- ceived after a RESTART condition is detected, with the value of 2 the I mission format when the 10-bit addressing format is selected, refer to Figure 35, (3) and (4). GNOK-M37516M6-XXXHP- “0.” The first 7-bit address register ). At the time of this comparison, address com- ...
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... Slave address Slave address Sr A 2nd bytes 1st 7 bits 8 bits 7 bits : Master to slave : Slave to master GNOK-M37516M6-XXXHP-50 Setup time Hold time ( s) 3.375 s (13.5 cycles) 3.375 s (13.5 cycles) 3.125 s (12.5 cycles) 3.125 s (12.5 cycles) 2.5 s (2.5 cycles) 2.5 s (2.5 cycles) 3.25 s (6.5 cycles) 3.25 s (6.5 cycles) 2.75 s (5.5 cycles) 2.75 s (5.5 cycles) 2 ...
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... Set dummy data in the I 002B ). gen- (8) When receiving control data of more than 1 byte, repeat step 16 (7). (9) When a STOP condition is detected, the communication ends. GNOK-M37516M6-XXXHP- and “0” in the RWB bit clock control register (address 002F 2 C status register (address 002D 16 ” ...
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... S1 until the bus busy flag BB becomes “0” after generating the STOP condition in the master mode because the STOP condition waveform might not be normally generated. Reading to the above registers do not have the problem. GNOK-M37516M6-XXXHP-50 (Select slave receive mode) (Taking out of slave address value) (Interrupt disabled) ...
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... PULSE WIDTH MODULATION (PWM) The M37516M6-XXXHP has a PWM function with an 8-bit resolu- tion, based on a signal that is the clock input X input divided by 2. Data Setting The PWM output pin also functions as port P4 riod by the PWM prescaler, and set the “H” term of output pulse by the PWM register ...
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... IN n+1 sec (Count source selection bit = 1, where n is the value set in the prescaler) f M37516M6-XXXHP ) (Changes “H” term from “A” to “B”.) (Changes PWM period from “T” to “T2”.) GNOK-M37516M6-XXXHP- (MSETSU 2) 36/54 GE ...
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... IN Fig. 41 Structure of A-D conversion registers Data bus A-D control circuit A-D conversion high-order register Comparator A-D conversion low-order register 10 Resistor ladder V AV REF GNOK-M37516M6-XXXHP- control register (ADCON : address 0034 ) 16 Analog input pin selection bits / / ...
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... Watchdog timer H (for read-out of high-order 6 bit) STP instruction disable bit 0: STP instruction enabled 1: STP instruction disabled Watchdog timer H count source selection bit 0: Watchdog timer L underflow 1: f(X )/16 or f(X IN GNOK-M37516M6-XXXHP- kHz frequency. CIN ) (or f(X )). The detection time in this case IN CIN ) = 8 MHz frequency and 128 ms at f(X IN Data bus “ ...
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... Notes 1: The frequency relation of f(X ) and f The question marks (?) indicate an undefined state that depends on the previous state. 3: All signals except X and RESET IN GNOK-M37516M6-XXXHP-50 Poweron (Note) Power source voltage Reset input voltage 0. Note : Reset release voltage ; Vcc=2.7 V ...
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... Watchdog timer control register (WDTCON) Interrupt edge selection register (INTEDGE) CPU mode register (CPUM) Interrupt request register 1 (IREQ1) Interrupt request register 2 (IREQ2) Interrupt control register 1 (ICON1) Interrupt control register 2 (ICON2) Processor status register Program counter Note : X indicates Not fixed . GNOK-M37516M6-XXXHP-50 00 0001 0003 0005 ...
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... CLOCK GENERATING CIRCUIT The M37516M6-XXXHP has two built-in oscillation circuits. An os- cillation circuit can be formed by connecting a resonator between X and X (X and X ). Use the circuit constants in ac- IN OUT CIN COUT cordance with the resonator manufacturer’s recommended values. No external resistor is needed between X feed-back resistor exists on-chip ...
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... High-speed or middle-speed mode Main clock division ratio selection bits (Note 1) Middle-speed mode High-speed or low-speed mode Main clock stop bit STP instruction WIT instruction GNOK-M37516M6-XXXHP-50 oscillation automati- IN oscillator. IN oscillation start and switch to the IN Prescaler 12 Timer 1 Reset or STP instruction (Note 2) ...
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... =1(8 MHz stopped =1(32 kHz oscillating) 4 before the switching from the low-speed mode to middle/high-speed IN pin and 32 kHz to the X IN GNOK-M37516M6-XXXHP-50 b4 CPU mode register (CPUM : address 003B ) Port Xc switch bit I/O port function (stop oscillating oscillating function CIN COUT ...
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... F mended. signal, set the transmit output enable bit RDY1 D pin after X GNOK-M37516M6-XXXHP- least on 500 kHz during the number of cycles needed to is half of the X IN pin) and GND pin (V pin) and between power ...
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... P4 –P4 (Note – –P3 (Note –P1 (Note –P2 ,P4 –P4 (Note GNOK-M37516M6-XXXHP-50 Ratings –0.3 to 6.5 –0 +0.3 CC –0 –0 +0.3 CC –0 +0.3 CC –0 +0.3 CC –0.3 to 5.8 300 – –40 to 125 Limits Min. Typ. 4.0 5.0 2.7 5 ...
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... P0 – – – – –P1 (Note 4.0 to 5.5V) (Note 2.7 to 5.5V) (Note 3) CC (avg) are average value measured over 100 ms. OH GNOK-M37516M6-XXXHP-50 Limits Min. Typ. Max – –10 10 (Note – –5 (Note ...
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... RESET, CNV – RESET,CNV When clock stopped GNOK-M37516M6-XXXHP-50 Limits Unit Min. Typ. Max. V –2 –1.0 CC 2.0 1.0 2.0 1.0 0.4 0.5 0.5 5.0 5.0 4 –5.0 –5.0 –4 5.5 2 “0” (MSETSU ...
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... Output transistors “off” Middle-speed mode f MHz (in WIT state stopped CIN Output transistors “off” Increment when A-D conversion is executed f MHz IN All oscillation stopped (in STP state) Output transistors “off” GNOK-M37516M6-XXXHP-50 Limits Unit Typ. Max. Min 200 5.0 10.0 7 ...
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... A-D port input current I(AD) M37516M6-XXXHP = – f MHz, unless otherwise noted Test conditions High-speed mode, middle-speed mode Low-speed mode V “on” 5.0 V REF REF V “off” REF GNOK-M37516M6-XXXHP-50 Limits Unit Min. Typ. Max. 10 bit LSB 150 200 A ...
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... IN Divide this value by four when f MHz and bit 6 of address 001A IN M37516M6-XXXHP Parameter is “1” (clock synchronous “0” (UART). 16 Parameter is “1” (clock synchronous “0” (UART). 16 GNOK-M37516M6-XXXHP-50 Limits Unit Min. Typ. Max 125 200 ...
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... P-channel output disable bit of the Serial I/O2 control register (bit 7 of address 0015 Test conditions Parameter Fig P-channel output disable bit of the UART control register (bit 4 of address 001B 5 X P-channel output disable bit of the Serial I/O2 control register (bit 7 of address 0015 GNOK-M37516M6-XXXHP-50 Limits Unit Min. Typ. Max )/2–30 ...
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... Measurement output pin CMOS output Fig. 53 Circuit for measuring output switching characteris- tics M37516M6-XXXHP 100pF GNOK-M37516M6-XXXHP-50 PA (MSETSU 2) 52/54 GE ...
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... C(S ), C(S CLK1 WL CLK1 CLK2 0. su CLK1 t su IN2 - CLK2 0. d(S -T D), CLK1 CLK2 OUT2 GNOK-M37516M6-XXXHP-50 t WL(CNTR) 0. WL(INT) 0. CLK2 t t WH(S ), WH(S ) CLK1 CLK2 0. h CLK1 t h CLK2 IN2 t v(S CLK1 t v(S CLK2 (MSETSU ...
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... SDA t BUF t LOW P S SCL t HD:STA Fig. 55 Timing diagram of multi-master I M37516M6-XXXHP Parameter HD:DAT HIGH su:DAT su:STA 2 C-BUS GNOK-M37516M6-XXXHP-50 Standard clock mode High-speed clock mode Min. Max. Max. Min. 1.3 4.7 4.0 0.6 1.3 4.7 20+0.1C 300 1000 0.9 4.0 0.6 20+0.1C 300 300 b 250 100 0.6 4.7 4.0 ...