HA5023IBZ Intersil, HA5023IBZ Datasheet - Page 7

• Manufacturer Part Number: HA5023IBZ
• Description: IC OPAMP DUAL 125MHZ VIDEO 8SOIC
• Manufacturer: Intersil

Specifications of HA5023IBZ

• Applications: Current Feedback
• Number Of Circuits: 2
• -3db Bandwidth: 125MHz
• Slew Rate: 350 V/µs
• Current - Supply: 7.5mA
• Current - Output / Channel: 20mA
• Voltage - Supply, Single/dual (±): ±4.75 V ~ 18 V
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Amplifier Type: High Slew Rate, High Speed, Video
• Bandwidth: 125 MHz
• Common Mode Rejection Ratio: 50
• Current, Input Bias: 4 μA
• Current, Output: 20 mA
• Current, Supply: 7.5 mA
• Number Of Amplifiers: Dual
• Package Type: SOIC-8
• Temperature, Operating, Range: -40 to +85 °C
• Time, Fall: 6 ns
• Time, Rise: 6 ns
• Voltage, Gain: 65 dB
• Voltage, Input: ±5 V
• Voltage, Noise: 4.5 nV/sqrt Hz
• Voltage, Offset: 5 mV
• Voltage, Output, High: +3 V
• Voltage, Output, Low: -3 V
• Voltage, Supply: 36 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Application Information
Optimum Feedback Resistor
The plots of inverting and non-inverting frequency response,
see Figure 8 and Figure 9 in the typical performance section,
illustrate the performance of the HA5023 in various closed
loop gain configurations. Although the bandwidth
dependency on closed loop gain isn’t as severe as that of a
voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and R
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and R
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to R
optimized for a 1000Ω R
a unity gain application decreases stability, resulting in
excessive peaking and overshoot. At higher gains the
amplifier is more stable, so R
off of stability for bandwidth.
The table below lists recommended R
gains, and the expected bandwidth.
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The use
of low inductance components such as chip resistors and
chip capacitors is strongly recommended. If leaded
components are used the leads must be kept short
especially for the power supply decoupling components and
those components connected to the inverting input.
Attention must be given to decoupling the power supplies. A
large value (10µF) tantalum or electrolytic capacitor in
parallel with a small value (0.1µF) chip capacitor works well
in most cases.
A ground plane is strongly recommended to control noise.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input (-IN). The
larger this capacitance, the worse the gain peaking, resulting
in pulse overshoot and possible instability. It is
recommended that the ground plane be removed under
GAIN
(A
+10
-10
+1
+2
+5
-1
CL
)
R
1000
1000
750
681
383
750
F
(Ω)
F
F
at a gain of +1. Decreasing R
. The HA5023 design is
F
7
can be decreased in a trade-
F
F
, in conjunction with
values for various
BANDWIDTH
(MHz)
100
125
95
52
65
22
F
F
in
.
HA5023
traces connected to -IN, and that connections to -IN be kept
as short as possible to minimize the capacitance from this
node to ground.
Driving Capacitive Loads
Capacitive loads will degrade the amplifier’s phase margin
resulting in frequency response peaking and possible
oscillations. In most cases the oscillation can be avoided by
placing an isolation resistor (R) in series with the output as
shown in Figure 6.
The selection criteria for the isolation resistor is highly
dependent on the load, but 27Ω has been determined to be
a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in dual amplifiers, care
must be taken to insure that the maximum junction
temperature (T
exceeded. Figure 7 shows the maximum ambient
temperature versus supply voltage for the available package
styles (Plastic DIP, SOIC). At ±5V
package styles may be operated over the full industrial range
of -40°C to 85°C. It is recommended that thermal calculations,
which take into account output power, be performed by the
designer.
FIGURE 6. PLACEMENT OF THE OUTPUT ISOLATION
FIGURE 7. MAXIMUM OPERATING AMBIENT TEMPERATURE
140
130
120
100
110
90
80
70
60
50
V
IN
5
RESISTOR, R
vs SUPPLY VOLTAGE
J
, see Absolute Maximum Ratings) is not
R
100Ω
T
R
7
I
SUPPLY VOLTAGE (±V)
SOIC
+
-
9
R
F
R
DC
quiescent operation both
11
PDIP
C
L
13
V
OUT
June 2, 2006
FN3393.8
15