LXT980AHC Intel Corporation, LXT980AHC Datasheet
LXT980AHC
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LXT980AHC Summary of contents
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater General Description The LXT980 is a 5-port 10/100 Class II Repeater that is fully compliant with IEEE 802.3 standards. Four ports directly support either 100BASE-TX/10BASE-T copper media or 100BASE-FX fiber media via pseudo-ECL (PECL) ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel’s website at http://www.intel.com. Copyright © Intel Corporation, 2001 *Third-party brands and names are the property of their respective owners. ...
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Contents 1.0 Pin Assignments and Signal Descriptions 2.0 Functional Description 2.1 Introduction..........................................................................................................20 2.1.1 TP/FX Port Configuration .......................................................................24 2.1.2 MII Port Configuration ............................................................................25 2.1.3 Interface Descriptions.............................................................................25 2.1.4 Repeater Operation................................................................................27 2.1.5 Management Support.............................................................................29 2.1.6 LED Drivers ............................................................................................30 2.2 Requirements ......................................................................................................30 2.2.1 Power ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 3.1.5 The RBIAS Pin ....................................................................................... 50 3.1.6 The Twisted-Pair Interface ..................................................................... 50 3.1.7 The Fiber Interface................................................................................. 50 3.1.8 Magnetics Information............................................................................ 51 3.2 Typical Application Circuitry ................................................................................ 52 4.0 Test Specifications 5.0 Register Definitions 5.1 ...
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Figures 1 LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater .................................. 9 2 Pin Assignments .................................................................................................10 3 Typical Managed Repeater Architectures ..........................................................21 4 Typical Unmanaged 100 Mbps Repeater Architectures .....................................21 5 Typical Hybrid Switch/Repeater Application .......................................................22 6 Typical Application Block Diagram .....................................................................23 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Tables 1 Mode Control Signal Descriptions....................................................................... 11 2 PHY Mode MII Interface Signal Descriptions ...................................................... 11 3 MAC Mode MII Interface Signal Descriptions ..................................................... 12 4 Inter-Repeater Backplane Signal Descriptions ................................................... 13 5 Twisted-Pair ...
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Counter Register Bit Assignments ......................................................................79 51 Port Counter Registers........................................................................................80 52 RMON Counter Registers ...................................................................................81 53 Ethernet Address Register Bit Assignments .......................................................82 54 Port Address Tracking Registers.........................................................................82 55 Search Address Registers...................................................................................83 56 Port Link Control and Status Register Bit Assignments ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Revision History Revision Date 8 Description Datasheet ...
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Figure 1. LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 10 Mbps 10M IRB Backplane 100 Mbps 100M IRB Backplane Mode Control Serial Mgmt Serial Port Port & Mgmt LED Drivers Status Indicators Datasheet LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 10BASE-T 10/100 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 1.0 Pin Assignments and Signal Descriptions Figure 2. Pin Assignments RESET .......53 CLK25 .......54 IR10ISO .......55 IR100ISO .......56 VCC .......57 RECONFIG .......58 SRX .......59 STX .......60 SERCLK .......61 SER_MATCH .......62 MMSTROUT .......63 ARBOUT .......64 ...
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Table 1. Mode Control Signal Descriptions 1 Pin Symbol Type 189 PORT1_SPD0 188 PORT1_SPD1 187 PORT2_SPD0 TTL Input, 186 PORT2_SPD1 PU, Latched on 185 PORT3_SPD0 reset 184 PORT3_SPD1 183 PORT4_SPD0 182 PORT4_SPD1 TTL Input, 100 PORT5_SPD PU TTL Input, 99 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 2. PHY Mode MII Interface Signal Descriptions (Continued) 1 Pin Symbol Type Output 21 MII_TXCLK Transmit Clock. 2 MHz continuous output derived from the 25 MHz input clock. TTL Input Transmit ...
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Table 4. Inter-Repeater Backplane Signal Descriptions 1 Pin Symbol Type TTL Input 199 MMSTRIN PD MMSTROUT TTL Output 100 Mbps IRB Signals (Refer to Figure 22 on page 57) 36 IR100CFS Analog I/O Analog I/O 37 IR100CFSBP NC ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 4. Inter-Repeater Backplane Signal Descriptions (Continued) 1 Pin Symbol Type 10 Mbps IRB Signals (Refer to Figure 23 on page 57) CMOS 9 IR10DAT I/O OD, PD Tri-state Schmitt 10 IR10CLK CMOS I/O ...
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Table 5. Twisted-Pair Port Signal Descriptions Pin Symbol Type 149, 151 TPOP1, TPON1 Analog 136, 138 TPOP2, TPON2 Output 121, 123 TPOP3, TPON3 108, 110 TPOP4, TPON4 146, 147 TPIP1, TPIN1 133, 134 TPIP2, TPIN2 Analog 118, 119 TPIP3, TPIN3 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 7. Serial Management Interface Signal Descriptions (Continued) 1 Pin Symbol Type TTL Output 60 STX OD Tri-state TTL 61 SERCLK I/O, PD TTL Input, PD, 198 ARBIN NC TTL Output 64 ARBOUT NC ...
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Table 8. LED Signal Descriptions (Continued) 1 Pin Symbol Type TTL 86 COL100_LED Output TTL 87 MGR_LED Output TTL 90 ACT10_LED Output TTL 91 ACT100_LED Output TTL 92 FAULT_LED Output TTL 98 RPS_LED Output Input contains pull-down. ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 9. Power Supply and Indication Signal Descriptions (Continued) Pin Symbol Type 131 RBIAS Analog 27, 130 GNDA Analog TTL Input 78 RPS_PRES PD TTL Input 77 RPS_FAULT Input contains ...
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Table 11. Miscellaneous Signal Descriptions (Continued) Pin Symbol Type AUTO_BLINK TTL Input, 74 (LXT980A only) PD TTL Output 81 IRQ OD 7, 15, 23, 31, 39, 47, 48, 97 101, 102, 103 Clamp. Pad ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 2.0 Functional Description 2.1 Introduction As a fully integrated IEEE 802.3 repeater capable of 10 Mbps and 100 Mbps functionality, the LXT980 is a very versatile device allowing great flexibility in Ethernet design solutions. ...
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Figure 3. Typical Managed Repeater Architectures Chassis Backplanes Buffer 10M Backplane Buffer 100M Backplane Serial Management SCC (8530) MII-to-MII Bridge (Any 2 LXT980s) Figure 4. Typical Unmanaged 100 Mbps Repeater Architectures Chassis Backplane Datasheet LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 5. Typical Hybrid Switch/Repeater Application 10M Backplane 100M Backplane Management to SCC (8530) MII Switch Connections 1 each for 10 M and 100M 22 10 Mbps Backplane 10 Mbps Backplane 100 Mbps Backplane ...
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Figure 6. Typical Application Block Diagram Serial Mgmt I/F SCC SRX STX 8530 SERCLK RECONFIG MG_PRSNT MII_RXCLK MII MII_RXD<3:0> MII_RXDV (Port 5, MII_RXER PHY Mode) MII_COL MII_CRS MII_TXCLK MII_TXD<3:0> MII_TXEN MII_TXER Input allows MAC to drive IRB MACACTIVE (10M Only) ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 2.1.1 TP/FX Port Configuration The LXT980 reads the hardware configuration pins at power-up, hardware reset, or software reset (but not at repeater reset), to determine operating conditions for each of its twisted-pair (TP) or ...
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Disable the port( changed. • Set Port Speed Control Register to desired speed. • Perform a repeater reset (LXT980 will not read hardware configuration pins. Refer to on page 88.) • Re-enable the port(s). Note: The entire ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater When used in 10T applications, the LXT980 sends and receives a non-continuous, 10 Mbaud Manchester-encoded waveform. To maintain link during idle periods, the LXT980 sends link pulses every 16 ms, and expects to receive ...
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On the LXT980, the MII always operates as a nibble-wide (4B) interface. Symbol mode (5B interface) is not supported on the LXT980 MII. 2.1.3.4 Serial Management Interface The Serial Management Interface (SMI) provides system access to the status, control and ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater • Partition. The LXT980 partitions any port participating in excess of 60 consecutive collisions or one long collision approximately 575.2 s long. Once partitioned, the LXT980 continues monitoring and transmitting to the port, but ...
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Un-partition. The LXT980 supports two un-partition algorithms. The default algorithm, which complies with the IEEE 802.3 specification, un-partitions a port when data can be either received or transmitted from the port for 450-560 bit times without a collision on ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 2.1.6 LED Drivers The LXT980 provides 23 LED drivers: • 3 mode-selectable port LED drivers (15 total) • 2 segment LED drivers (4 total) • 4 global LED drivers Refer to Table 8 on ...
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Multiple devices on the same board can share a single common PROM. The LXT980 with ChipID = 0 actively reads the PROM at power-up; all other LXT980s listen in. If PROM arbitration is not used, the PROM data input signal ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater internal register. The LEDs generally operate under hardware control although some limited software overrides are available. In addition to On and Off states, some LED drivers provide a blink state output. 2.3.1 Blink Rates ...
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Activity LEDs The activity LEDs turn on for approximately 4 ms when the LXT980 detects any activity on the respective 10 Mbps or 100 Mbps segment. During the time that the activity LED is on, any additional activity is ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 13. LED Mode 1 Indications Operating LED Mode 10 Mbps Link up, not partitioned operation PORTnLED1 100 Mbps Link up, not partitioned, operation not isolated 10 Mbps Link up, partitioned operation PORTnLED2 100 ...
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Table 15. LED Mode 3 Indications Operating LED Mode 10 Mbps Link up, not partitioned operation PORTnLED1 100 Mbps Link up, not partitioned, operation not isolated 10 or 100 Receive activity PORTnLED2 Mbps ops (20 ms pulse) Auto-neg 100 Mbps ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 2.4.3 MMSTRIN, MMSTROUT This daisy chain is provided for correct gathering of statistics in multiple-device configurations. In multiple-board applications, this daisy chain must be maintained across boards. In stand-alone applications, or for the first ...
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Table 17. IRB Signal Details Name Pad Type IR100DAT<4:0> Digital IR100CLK Digital IR100DV Digital, Open Drain IR100CFS Analog IR100CFSBP Analog IR100COL Digital IR100SNGL Digital IR100DEN Digital, Open Drain IR100ISO Digital IR10DAT Digital, Open Drain IR10CLK Digital IR10ENA Digital, Open Drain ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 2.5.1 PHY Mode Operation PHY Mode is available at both 10 and 100 Mbps. It allows the LXT980 to interface 100 Mbps MAC. When operating at 100 Mbps, the LXT980 ...
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MII Port Timing Considerations The IEEE 802.3u specification provides propagation delay constraints for standard PHY devices in Section 24.6, and for repeater devices in Section 27. The LXT980 MII port is a hybrid that does not fit either of ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 9. MII Timing Issues A Propagation Delay Requirements per IEEE 802.3u:- PHY prop delay (MII-TP) must be Class II RPTR Prop Delay PHY Prop Delay 20 BT MII-to-MII Prop ...
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Figure 10. Typical Serial Bus Architecture Network Management 8530 Serial Controller User Definable Partitioning 2.6.1 Serial Clock SERCLK is a bidirectional pin; direction control is provided by the RECONFIG input. If RECONFIG is High, the LXT980 will drive SERCLK at ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Note: The LXT980 uses the CCITT method of CRC (X16 + X12 + X5 +1). 2.6.3.2 Auto-Clearing Registers Two registers, the Interrupt Status Register, see Register, see Table 55 on page How Auto Clearing ...
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Figure 11. Serial Management Frame Format Start Idle Flag Hub ID Header Content: 5 bits Table 20. Serial Management Header Storage MSB Addr 11 Addr 10 Increasing Address Addr 3 Addr 2 Length 2 Length 1 ChipID 2 ChipID 1 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 22. Typical Serial Management Packets Message Hub Write User defined 1, 3 Read Request User defined 3 Read Response 00000 Assign Hub ID 11111 (Arb Method 1) Assign Hub ID ...
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The network manager must respond to each request with a message that includes the 48-bit ID and the HubID. All devices hear this message, but only those that match the 48-bit ID receive the HubID as their own. Once a ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 12. Address Arbitration Mechanisms Network EPROM Mechanism Manager for Address Arbitration SRX/STX PROMDTI/O PROMDTI/O LXT980 LXT980 SRX/STX SRX/STX SRX/STX SRX/STX LXT980 LXT980 PROMDTI/O PROMDTI/O Serial I/F to Next Module 2.7 Serial EEPROM Interface ...
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Figure 13. Serial EEPROM Interface 93CS46 Figure 14. Optional R/W Serial EEPROM Interface CLK DTOUT CS Datasheet LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater PROM_DTOUT PROM_DTIN PROM_CLK PROM_CS PROM_DTIN PROM_CLK Outgoing Data is sent on the falling clock edge. Incoming Data ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 3.0 Application Information 3.1 Design Recommendations The LXT980 has been designed to comply with IEEE requirements and to provide outstanding receive BER and long-line-length performance. Lab testing has shown that the LXT980 can perform ...
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The recommended implementation is to divide the VCC plane into two sections. The digital section supplies power to the digital VCC pin, and to the external components. The analog section supplies power to VCCH, VCCT, and VCCR pins of the ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 3.1.5 The RBIAS Pin The LXT980 requires a 22.1 k ground. Place the RBIAS resistor as close to the RBIAS pin as possible. Run an etch directly from the pin to the resistor, and ...
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Magnetics Information The LXT980 requires a 1:1 ratio for the receive transformers and a 2:1 ratio for the transmit transformers. The transformer isolation voltage should be rated protect the circuitry from static voltages across the ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 3.2 Typical Application Circuitry Figure 15 through Figure 18 through Figure 25 show application circuitry details. Figure 15. Managed 10/100 Repeater Stack Bridge 10M 100M MAC MAC Inter-Repeater Backplanes LXT980 10M 100M 100M MII ...
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Figure 17. Hybrid Switch/Repeater Application - Weighted Toward 100 Mbps Performance Memory 100 Mbps MAC 100 Mbps LXT980 LXT980 100M 10M 100M MII IRB IRB IRB TP/Fiber Ports Figure 18. Unmanaged 100-Only Repeater Stack Inter-Repeater Backplanes LXT980 10M 100M LEDs ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 19. Power and Ground Connections LXT980 VCCT GNDT VCCV GNDV RBIAS GNDA VCCR GNDR VCC GND 54 To Output Magnetics Centertap . .01 F 22. ...
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Figure 20. Typical Fiber Port Interface 0.01 F FIBONn FIBOPn 0.01 F LXT980 SIGDETn 1 FIBINn FIBIPn Datasheet LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater VCCT + GNDA W W 191 191 GNDA VCCR +5 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 21. Typical Twisted-Pair Port Interface and Power Supply Filtering Compensating Inductor 0.1 F GNDR TPIP TPIN TPOP LXT980 TPON VCCT 0.1 F GNDT 1. Receiver common mode bypass cap may improve BER performance ...
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Figure 22. Typical 100 Mbps IRB Implementation +5V Stack or Segment 1 k Connector ’245 IR100CLKBP A B IR100DATBP IR100DVBP\ DIR 91 ENA 1%* 1 IR100CFSBP stacked configurations, all devices with ChipID = 0 are tied together at ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 24. Typical Serial Management Interface Connections VCC 1k STX ’05 VCC 1k SRX * This resistor installed in base module only. Figure 25. Typical Reset Circuit VCC VCC 1k ’05 ...
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Test Specifications Table 24 through Table 48 specifications of the LXT980/980A. These specifications are guaranteed by test except where noted “by design.” Minimum and maximum values listed in the recommended operating conditions specified in Table 24. Absolute Maximum Ratings ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 27. I/O Electrical Characteristics Parameter Sym Input Low voltage V Input High voltage V Hysteresis voltage Output Low voltage V Output Low voltage (LED) V OLL Output High voltage V Input Low current ...
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Table 29. 10 Mbps IRB Electrical Characteristics Parameter Output Low voltage Output rise or fall time Input High voltage Input Low voltage Hysteresis voltage single drive IR10CFS current collision single drive IR10CFSBP current collision single drive IR10CFS/BP voltage collision 1. ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 31. 100BASE-FX Transceiver Electrical Characteristics (Continued) Parameter Symbol Peak differential input voltage Common mode input range 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not ...
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Figure 26. 100 Mbps Port-to-Port Delay Timing Normal Propagation TP / FIB Input TP / FIB Output Collision Jamming TP / FIB Input # FIB Input # FIB Output Jam Table 33. 100 Mbps Port-to-Port Delay ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 27. 100BASE-TX Transmit Timing - PHY MODE MII TX_CLK t 2A TXD, TX_EN, TX_ER t 2C CRS TPOP/N Table 34. 100BASE-TX Transmit Timing Parameters - PHY Mode MII Parameter TXD, TX_EN, TX_ER Setup ...
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Figure 28. 100BASE-TX Receive Timing - PHY Mode MII TPIP CRS RXD, RX_DV, RX_ER RX_CLK t 3F COL Table 35. 100BASE-TX Receive Timing Parameters - PHY Mode MII Parameter Sym t TPIP CRS asserted 3A t ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 29. 100BASE-TX Transmit Timing - MAC Mode MII RX_CLK t 4A RXD, RX_DV, RX_ER TPOP/N Table 36. 100BASE-TX Transmit Timing Parameters - MAC Mode MII Parameter RXD, RX_DV, RX_ER Setup to RX_CLK High ...
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Figure 30. 100BASE-TX Receive Timing - MAC Mode MII TPIP TXD, TX_EN, TX_ER TX_CLK Table 37. 100BASE-TX Receive Timing - MAC Mode MII Parameter TPIP TXD, TX_EN, TX_ER TPIP/N quiet to TXD de-asserted TX_CLK rising edge ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 31. 100BASE-FX Transmit Timing - PHY Mode MII TX_CLK t 6A TXD, TX_EN, TX_ER t 6B CRS FIBOP/N Table 38. 100BASE-FX Transmit Timing Parameters - PHY Mode MII Parameter TXD, TX_EN, TX_ER Setup ...
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Figure 32. 100BASE-FX Receive Timing - PHY Mode MII FIBIP CRS RXD, RX_DV, RX_ER RX_CLK t COL 7F Table 39. 100BASE-FX Receive Timing - PHY Mode MII Parameter Sym t FIBIP CRS asserted 7A t FIBIP/N ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 33. 100BASE-FX Transmit Timing - MAC Mode MII RX_CLK t 8A RXD, RX_DV, RX_ER FIBOP/N Table 40. 100BASE-FX Transmit Timing - MAC Mode MII Parameter RXD, RX_DV, RX_ER Setup to RX_CLK High RXD, ...
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Figure 34. 100BASE-FX Receive Timing - MAC Mode MII FIBIP TXD, TX_EN, TX_ER TX_CLK Table 41. 100BASE-FX Receive Timing - MAC Mode MII Parameter FIBIP TXD, TX_EN, TX_ER FIBIP/N quiet to TXD de-asserted TX_CLK rising edge ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 35. 10BASE-T Transmit Timing - PHY Mode MII TX_CLK t 10A TXD, TX_EN, TX_ER t 10C CRS Table 42. 10BASE-T Transmit Timing Parameters - PHY Mode MII Parameter TXD, TX_EN, TX_ER Setup to ...
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Figure 36. 10BASE-T Receive Timing - PHY Mode MII TPIP/N t 11A CRS RXD, RX_DV, RX_ER RX_CLK t 11D COL Table 43. 10BASE-T Receive Timing Parameters - PHY Mode MII Parameter Sym t TPIP CRS asserted 11A CRS ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 37. 100 Mbps IRB Timing TPIP/N FIBIP/N t 12A IR100DV IR100CFS 1R100COL IR100DAT<4:0> IR100CLK Table 44. 100 Mbps IRB Timing Parameters Parameter TPIP/N or FIBP/N to IR100DV Low IR100DAT to IR100CLK setup time. ...
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Figure 38. 10 Mbps IRB Receive Timing TPIP/N t 13A IR10ENA IR10DAT IR10CLK Table 45. 10 Mbps IRB Receive Timing Parameters Parameter Symbol t TPIP/N to IR10ENA Low 13A IR10CLK rising edge to t 13B IR10DAT rising edge. IR10CLK rising ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 39. 10 Mbps IRB Transmit Timing MACACTIVE t 14A IR10ENA IR10DAT IR10CLK TPOP/N Table 46. 10 Mbps IRB Transmit Timing Parameters Parameter Symbol MACACTIVE to IR10ENA t 3 assertion delay IR10DAT (input) to ...
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Figure 40. Serial Management Interface Timing SERCLK SRX STX Table 47. Serial Interface Timing Characteristics Parameter Symbol SERCLK input frequency – SERCLK output frequency – Data to clock setup time t15A Clock to data hold time t15B Data propagation delay ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Figure 41. PROM Interface Timing PROM_CLK t 16A PROM_CS PROM_DTOUT PROM_DTIN Table 48. PROM Interface Timing Characteristics Parameter PROM_CLK CLK to PROM_CS delay CLK to PROM_DTOUT delay PROM_DTIN to CLK setup time PROM_DTIN to ...
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Register Definitions The LXT980/980A register set is composed of multiple 32-bit registers of the types listed in 49. All register addresses are hexadecimal. Table 49. Register Set Base Register Type 1 Address 00X Port 1 Counters (TP/FX) 01X Port ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 51. Port Counter Registers Name Registers Used When Running 100 Mbps rptrMonitorPortReadableFrames rptrMonitorPortReadableOctets (Lower/Upper) rptrMonitorPortFrameCheckSequence rptrMonitorPortAlignmentErrors rptrMonitorPortFramesTooLong rptrMonitorPortShortEvents rptrMonitorPortRunts rptrMonitorPortCollisions rptrMonitorPortLateEvents rptrMonitorPortVeryLongEvents rptrMonitorPortDataRateMismatches rptrMonitorPortAutoPartitions rptrTrackSourceAddrChanges rptrMonitorPortBroadcastPkts rptrMonitorPortMulticastPkts Registers used only ...
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Table 51. Port Counter Registers (Continued) Name rptrMonitorPortIsolates - Port 1 rptrMonitorPortIsolates - Port 2 rptrMonitorPortIsolates - Port 3 rptrMonitorPortIsolates - Port 4 rptrMonitorPortIsolates - Port 5 rptrMonitorSymbolErrorDuringPacket - Port 1 rptrMonitorSymbolErrorDuringPacket - Port 2 rptrMonitorSymbolErrorDuringPacket - Port 3 rptrMonitorSymbolErrorDuringPacket ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 52. RMON Counter Registers (Continued) Name etherStatsCollisions/ rptr Monitor Transmit Collisions etherStatsPkts64Octets etherStatsPkts65to127Octets etherStatsPkts128to255Octets etherStatsPkts256to511Octets etherStatsPkts512to1023Octets etherStatsPkts1024to1518Octets Not Used rptrMonitorTotalOctets (Lower/Upper) 5.2 Ethernet Address Registers All Ethernet address registers consist of two 32-bit ...
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Search Address Registers The Search Address Register set is described in Table 55. Search Address Registers Name Search Address Register Refer to Table 53 for bit assignments. Search Port Match Register R Refer to Table 56 on page 83 ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 5.3.2 General Port Control Registers The General Port Control Register set is described in Port Control Registers bit assignments. Table 58. General Port Control and Status Register Bit Assignments 31:5 4 Rsvd Port 5 ...
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Port Learn and Speed Control Registers The port learn and speed control register set is described in for the bit assignments of these registers. Table 60. Port Learn and Speed Control Registers 31: Rsvd Port 5 (MII) ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 63. Port Status Registers 1 Name Type Addr Port Link Status R 098 Port Polarity Status R 099 Port Partition Status R 09A Port Speed Status R 09C Port Isolation Status R 09D ...
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Table 66. Interrupt Status Register Bit Definitions 1 Bit Name Type 31:8 Reserved R/W Reserved - Write as 0s; ignore on read. A ‘1’ indicates that one of four conditions has occurred port in fiber mode received the ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 68. MII Status Register Name Type MII Register R 5.4 Configuration Registers The Configuration Register set is described in registers are shown in Table 69. Configuration Registers Name Repeater Configuration Register Repeater Serial ...
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Table 69. Configuration Registers (Continued) Name Port LED Control Register LED Timer Control Register Repeater Reset Register Software Reset Register Assign Address Register (1 and 2) EPROM Address Register (1 and Read only Write ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 70. Repeater Configuration Register Bit Assignments 31: Enable Port Auto Stats Reserved Late Clear Enable Event Table 71. Repeater Configuration Register Bit Definitions 1 Bit Name Type 31:13 Reserved R/W ...
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Table 72. Device/Revision Register Bit Assignment 31:28 27:12 Version Part No. 0100 (LXT980) 0000 0011 1101 0100 0110 (LXT980A) 1. The JEDEC 8-bit identifier. However, the MSB is for parity only and is ignored. Intel’s JEDEC ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater 5.5 Auto-Negotiation Registers Table 78. Auto-Negotiation Registers Name Auto-Negotiate Link Partner Ability #1 (Port 1) Auto-Negotiate Link Partner Ability #2 (Port 2) Auto-Negotiate Link Partner Ability #3 (Port 3) Auto-Negotiate Link Partner Ability #4 ...
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Table 79. Auto-Negotiation Link Partner Ability Registers (Continued) Bit Name Description 10BASE Link Partner is 10BASE-T full-duplex capable. 6 full-duplex 0 = Link Partner is not 10BASE-T full-duplex capable Link Partner is 10BASE-T capable. 5 10BASE-T ...
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LXT980/980A Dual-Speed, 5-Port Fast Ethernet Repeater Table 81. Auto-Negotiation Advertisement Register (Continued) Bit Name 1 = DTE is 100BASE-TX full-duplex capable. 8 100BASE- DTE is not 100BASE-TX full-duplex capable DTE is 100BASE-TX capable. 7 100BASE-TX ...
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... Figure 42. Package Specifications 208-Pin Plastic Quad Flat Package 208-Pin Plastic Quad Flat Package • Part Numbers: • Part Numbers: • LXT980QC • LXT980QC • LXT980AHC • LXT980AHC • Commercial Temperature Range ( • Commercial Temperature Range ( ...
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