KM416S1020CT-G10 Samsung, KM416S1020CT-G10 Datasheet
KM416S1020CT-G10
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KM416S1020CT-G10 Summary of contents
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... KM416S1020C SDRAM Samsung Electronics reserves the right to change products or specification without notice. 512K x 16bit x 2 Banks Synchronous DRAM LVTTL Revision 0.6 September 1998 - 1 - CMOS SDRAM Rev. 0.6 (Sep. 1998) ...
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KM416S1020C Revision History Revision 0.6 (September 10, 1998) • Removed KM416S1020C-H/L product (-H: 100MHz @ CL=2, -L: 100MHz @ CL3 ) • Changed the clock cycle time of KM416S1020C-8 @ CL2 from 12ns to 10ns, accordingly, the AC and DC ...
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... ORDERING INFORMATION KM416S1020CT-G/F6 KM416S1020CT-G/F7 KM416S1020CT-G/F8 KM416S1020CT-G/F10 Data Input Register 512K x 16 512K x 16 Column Decoder Latency & Burst Length Programming Register ...
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KM416S1020C PIN CONFIGURATION (TOP VIEW) PIN FUNCTION DESCRIPTION Pin Name CLK System Clock CS Chip Select CKE Clock Enable /AP Address Bank Select Address RAS Row Address Strobe CAS Column Address Strobe WE Write ...
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KM416S1020C ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. ...
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... Refresh Current I CC5 Self Refresh Current I CC6 Note : 1. Measured with outputs open. Addresses are changed only one time during tcc(min). 2. Refresh period is 64ms. Addresses are changed only one time during tcc(min). 3. KM416S1020CT-G** 4. KM416S1020CT-F Test Condition Burst Length = (min ...
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KM416S1020C AC OPERATING TEST CONDITIONS Parameter Input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Output 870 (Fig Output Load Circuit Note : 1. The DC/AC ...
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KM416S1020C AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS Latency=3 CLK cycle time CAS Latency=2 CAS Latency=3 CLK to valid output delay CAS Latency=2 Output data CAS Latency=3 CLK high pulse width CAS Latency=2 CAS Latency=3 CLK low ...
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KM416S1020C SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Refresh Self Refresh Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable Burst ...
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KM416S1020C MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with MRS Address BA A /AP 10 Function RFU RFU Test Mode A A Type Mode Register Set 0 1 Reserved 1 0 Reserved 1 1 ...
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KM416S1020C BURST SEQUENCE (BURST LENGTH = 4) Initial Address BURST SEQUENCE (BURST LENGTH = 8) Initial Address ...
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KM416S1020C DEVICE OPERATIONS CLOCK (CLK) The clock input is used as the reference for all SDRAM opera- tions. All operations are synchronized to the positive going edge of the clock. The clock transitions must be monotonic between V and V ...
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KM416S1020C DEVICE OPERATIONS (Continued) MODE REGISTER SET (MRS) The mode register stores the data for controlling the various operating modes of SDRAM. It programs the CAS latency, burst type, burst length, test mode and various vendor specific options to make ...
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KM416S1020C DEVICE OPERATIONS (Continued) DQM OPERATION The DQM is used to mask input and output operations. It works similar to OE during read operation and inhibits writing during write operation. The read latency is two cycles from DQM and zero ...
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KM416S1020C BASIC FEATURE AND FUNCTION DESCRIPTIONS 1. CLOCK Suspend 1) Clock Suspended During Write (BL=4) CLK CMD WR CKE Internal CKE DQ(CL2 DQ(CL3 DQM Operation 1) Write Mask (BL=4) CLK WR ...
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KM416S1020C 3. CAS Interrupt (I) 1) Read interrupted by Read (BL=4) CLK CMD ADD DQ(CL2) QA DQ(CL3) tCCD Note 2 2) Write interrupted by Write (BL=2) CLK CMD WR WR tCCD Note ADD ...
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KM416S1020C 3. CAS Interrupt (I) 1) Read interrupted by Read (BL=4) CLK CMD ADD DQ(CL2) QA DQ(CL3) tCCD Note 2 2) Write interrupted by Write (BL=2) CLK CMD WR WR tCCD Note ADD ...
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KM416S1020C ( Continued ) (b) CL=3, BL=4 CLK i) CMD RD DQM DQ ii) CMD RD DQM DQ RD iii) CMD DQM DQ RD iii) CMD DQM DQ RD iv) CMD DQM DQ 5. Write Interrupted by Precharge & DQM ...
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KM416S1020C 6. Precharge 1) Normal Write (BL=4) CLK WR CMD Normal Read (BL=4) CLK CMD RD DQ(CL2) DQ(CL3) 7. Auto Precharge 1) Normal Write (BL=4) CLK WR CMD Normal Read ...
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KM416S1020C 8. Burst Stop & Interrupted by Precharge 1) Normal Write (BL=4) CLK WR CMD DQM Read Interrupted by Precharge (BL=4) CLK CMD RD DQ(CL2) DQ(CL3) 9. MRS 1) Mode Register Set CLK Note 4 ...
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KM416S1020C 10. Clock Suspend Exit & Power Down Exit 1) Clock Suspend (=Active Power Down) Exit CLK CKE Internal Note 1 CLK CMD 11. Auto Refresh & Self Refresh 1) Auto Refresh & Self Refresh CLK Note 4 CMD PRE ...
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KM416S1020C 12. About Burst Type Control Sequential Counting Basic MODE Interleave Counting Random Random column Access MODE CLK CCD 13. About Burst Length Control 1 2 Basic MODE 4 8 Full Page Special BRSW MODE Random Burst ...
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KM416S1020C FUNCTION TRUTH TABLE (TABLE 1) Current CS RAS CAS State IDLE ...
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KM416S1020C FUNCTION TRUTH TABLE (TABLE 1) Current CS RAS CAS State Row Activating ...
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KM416S1020C FUNCTION TRUTH TABLE (TABLE 2) CKE Current CKE CS n State (n- Self Refresh ...
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KM416S1020C Single Bit Read-Write-Read Cycle(Same Page) @CAS Latency=3, Burst Length=1 tCH CLOCK tCC CKE *Note 1 CS tRCD tSH RAS tSS tSH CAS tSS tSH ADDR Ra Ca tSS *Note 2 *Note 2 ...
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KM416S1020C *Note : 1. All inputs expect CKE & DQM can be don 2. Bank active & read/write are controlled by BA Enable and disable auto precharge function are controlled by A10/AP ...
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KM416S1020C Power Up Sequence CLOCK CKE High level is necessary CS tRP RAS CAS ADDR BA A /AP 10 High DQM High level is necessary Precharge Auto Refresh (All Banks ...
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KM416S1020C Read & Write Cycle at Same Bank @Burst Length CLOCK CKE CS tRCD RAS CAS ADDR Ra Ca0 CL=2 DQ tRAC *Note 3 CL=3 tRAC *Note 3 WE DQM Row ...
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KM416S1020C Page Read & Write Cycle at Same Bank @Burst Length CLOCK CKE CS tRCD RAS CAS ADDR Ra Ca0 CL=2 CL=3 WE DQM Row Active Read (A-Bank) (A-Bank) *Note ...
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KM416S1020C Page Read Cycle at Different Bank @Burst Length CLOCK CKE *Note 1 CS RAS CAS ADDR RAa CAa RBb BA A /AP RAa RBb 10 DQ CL=2 CL=3 WE DQM Row Active Row Active (A-Bank) ...
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KM416S1020C Page Write Cycle at Different Bank @Burst Length CLOCK CKE CS RAS CAS RAa CAa ADDR BA A /AP RAa 10 DQ DAa0 DAa1 DAa2 WE DQM Row Active (A-Bank) Write (A-Bank) *Note : 1. ...
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KM416S1020C Read & Write Cycle at Different Bank @Burst Length CLOCK CKE CS RAS CAS ADDR RAa CAa BA A /AP RAa 10 DQ CL=2 CL=3 WE DQM Row Active Read (A-Bank) (A-Bank) *Note : 1. ...
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KM416S1020C Read & Write Cycle with Auto Precharge I @Burst Length CLOCK CKE CS RAS CAS ADDR / CL=2 CL=3 WE DQM Row Active (A-Bank) Row Active (B-Bank) ...
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KM416S1020C Read & Write Cycle with Auto Precharge II @Burst Length CLOCK CKE CS RAS CAS ADDR / CL=2 CL=3 WE DQM Row Active (A-Bank) *Note : ¨ç Any command ...
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KM416S1020C Clock Suspension & DQM Operation Cycle @CAS Latency=2, Burst Length CLOCK CKE CS RAS CAS ADDR / DQM Row Active Read *Note : 1. DQM is needed ...
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KM416S1020C Read Interrupted by Precharge Command & Read Burst Stop Cycle @Burst Length=Full page CLOCK CKE CS RAS CAS RAa CAa ADDR BA A /AP RAa 10 DQ CL=2 CL=3 WE DQM Row Active Read (A-Bank) ...
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KM416S1020C Write Interrupted by Precharge Command & Write Burst Stop Cycle @ Burst Length=Full page CLOCK CKE CS RAS CAS ADDR RAa CAa BA RAa A / DAa0 DAa1 DAa2 DAa3 DAa4 WE DQM ...
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KM416S1020C Burst Read Single bit Write Cycle @Burst Length CLOCK *Note 1 CKE CS RAS CAS ADDR RAa CAa BA A /AP RAa 10 DQ CL=2 DAa0 CL=3 DAa0 WE DQM Row Active (A-Bank) Write (A-Bank) ...
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KM416S1020C Active/Precharge Power Down Mode @CAS Latency=2, Burst Length CLOCK tSS *Note 1 CKE *Note 3 CS RAS CAS ADDR DQM Precharge Power-down Entry *Note : 1. Both banks should ...
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KM416S1020C Self Refresh Entry & Exit Cycle CLOCK *Note 2 *Note 1 CKE tSS CS RAS CAS ADDR Hi-Z WE DQM Self Refresh Entry *Note : TO ENTER SELF REFRESH MODE ...
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KM416S1020C Mode Register Set Cycle CLOCK HIGH CKE CS *Note 2 RAS *Note 1 CAS *Note 3 ADDR Key Ra DQ Hi-Z WE DQM MRS New Command * Both banks precharge should be completed before Mode ...
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KM416S1020C PACKAGE DIMENSIONS 50-TSOP2-400F #50 #1 0.10 MAX 0.004 0.805 ( ) 0.032 #26 #25 21.35 MAX 0.841 20.95 0.10 0.825 0.004 +0.10 0.30 0.80 0.05 -0.05 +0.004 0.0315 0.012 0.002 -0.002 - 43 CMOS SDRAM Unit : Millimeters 0.25 ...