MBM29F800B-90PFTN Fujitsu, MBM29F800B-90PFTN Datasheet

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MBM29F800B-90PFTN

Manufacturer Part Number
MBM29F800B-90PFTN
Description
CMOS 8M (1M x 8/512K x 16) FLASH MEMORY
Manufacturer
Fujitsu
Datasheet
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
8M ( 1M 8/512K 16 )
MBM29F800T/MBM29F800B
Embedded Erase and Embedded Program
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard word-wide pinouts
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready-Busy output (RY/BY)
• Low power consumption
• Low Vcc write inhibit
• Erase Suspend/Resume
DISTINCTIVE CHARACTERISTICS
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
90 ns maximum access time
One 16K byte, two 8K bytes, one 32K byte, and fifteen 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T=Top sector
B=Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for cletection of program or erase cycle completion
20 mA typical active read current for Byte Mode
28 mA typical active read current for Word Mode
30 mA typical write/erase current
25 A typical standby current
Suspends the erase operation to allow a read in another sector within the same device
DATA SHEET
Algorithms
Algorithms
3.2 V
are trademarks of Advanced Micro Devices, Inc.
2
PROMs
DS05–20816–2E
(Continued)

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MBM29F800B-90PFTN Summary of contents

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... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 8/512K 16 ) MBM29F800T/MBM29F800B DISTINCTIVE CHARACTERISTICS • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard word-wide pinouts 48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • ...

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MBM29F800T/800B (Continued) • Sector protection Hardware method disables any combination of sectors from write or erase operations • Temporary sector unprotection Hardware method temporarily enables any combination of sectors from write on erase operations PACKAGE Marking side (FPT-48P-M19) 48-pin TSOP ...

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... Fujitsu’s Flash technology combines years of EPROM and E quality, reliability, and cost effectiveness. The MBM29F800T/B memory electrically erases the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM programming mechanism of hot electron injection ...

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... MBM29F800B Sector Architecture FFFFFh EFFFFh DFFFFh CFFFFh BFFFFh AFFFFh 9FFFFh 8FFFFh 7FFFFh 6FFFFh 5FFFFh 4FFFFh 3FFFFh 2FFFFh 1FFFFh ...

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... RY/BY Buffer State BYTE Control RESET Command Register Program Voltage Detector A-1 MBM29F800T/MBM29F800B – 90 — Erase Voltage Generator Chip Enable Generator Output Enable Logic Y-Decoder STB Address Timer Latch X-Decoder MBM29F800T/800B — – 12 120 120 60 DQ ...

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... FPT-48P-M19 A 24 (Marking Side RY/BY 15 N.C. 14 N.C. 13 MBM29F800T/MBM29F800B RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 SOP (Top View) ...

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LOGIC SYMBOL A RESET RY/BY BYTE MBM29F800T/800B Table 1 MBM29F800T/B Pin Configuration Pin Function A- Address Inputs ...

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... MBM29F800T/800B ORDERING INFORMATION Standard Devices Fujitsu standard devices are available in several packages. The order number is formed by a combination of: MBM29F800 T –90 PFTN DEVICE NUMBER/DESCRIPTION MBM29F800 8Mega-bit (1M 8-Bit or 512K 5.0 V-only Read, Write, and Erase 8 PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP) Standard Pinout ...

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Table 2 MBM29F800T/B User Bus Operations (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) Read (3) Standby Output Disable Write Enable Sector Protection (2) Verify Sector Protection (2) Temporary Sector Unprotection Reset (Hardware)/Standby Table 3 MBM29F800T/B ...

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... D6H and MBM29F800B = 58H for x8 mode; MBM29F800T = 22D6H and MBM29F800B = 2258H for x16 mode). These two bytes/words are given in the tables 4.1 and 4.2. All identifiers for manufacturer and device will exhibit odd parity with DQ defined as the parity bit ...

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... Table 4.2 Expanded Autoselect Code Table Code DQ Type Manufacturer’s Code 04H A-1/0 MBM29F800T (B) D6H (W) 22D6H Device Code MBM29F800B (B) 58H (W) 2258H Sector Protection 01H A-1/0 (B): Byte mode (W): Word mode Write Device erasure and programming are accomplished via the command register. The contents of the register serve as inputs to the internal state machine ...

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MBM29F800T/800B To activate this mode, the programming equipment must force 11.5 V and The sector addresses ( sector to be protected. Tables 5 and 6 define ...

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Table 5 Sector Address Tables (MBM29F800T) Sector Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 1 SA5 0 1 SA6 0 1 SA7 0 1 SA8 1 0 ...

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... MBM29F800T/800B Table 6 Sector Address Tables (MBM29F800B) Sector Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 0 SA5 0 0 SA6 0 0 SA7 0 1 SA8 0 1 SA9 0 1 SA10 0 1 SA11 1 0 SA12 1 0 SA13 1 0 SA14 1 0 SA15 ...

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Table 7 MBM29F800T/B Command Definitions Bus First Bus Write Write Cycle Command Cycles Sequence Req'd Addr Word Read/Reset 1 XXXXH Byte Word 5555H Read/Reset 3 Byte AAAAH Word 5555H Autoselect 3 Byte AAAAH Word 5555H Program 4 Byte AAAAH Word ...

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... XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for x16(XX02H for x8) returns the device code (MBM29F800T = D6H and MBM29F800B = 58H for x8 mode; MBM29F800T = 22D6H and MBM29F800B = 2258H for x16 mode). (See Tables 4.1 and 4.2.) All manufacturer and device codes will exhibit odd parity with DQ Sector state (protection or unprotection) will be informed by address XX02H for x16 (XX04H for x8) ...

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Two more “unlock” write cycles are then followed by the chip erase command. Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase Algorithm command sequence the device will ...

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MBM29F800T/800B When the Erase Suspend command is written during the Sector Erase operation, the device will take a maximum suspend the erase operation. When the device has entered the erase-suspended mode, the RY/BY output pin and ...

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DQ 7 Data Polling The MBM29F800T/B device features Data Polling as a method to indicate to the host that the Embedded Algo- rithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the device will ...

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MBM29F800T/800B will partially power down the device under these conditions (to approximately 2 mA). The OE and WE pins will control the output disable functions as described in Tables 2 and 3. The DQ failure condition may also appear if ...

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For example, DQ and DQ can be used together to determine the erase-suspend-read mode ( does not). See also Table 7 and Figure 17. 6 Furthermore, DQ can also be used to determine which sector is being ...

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MBM29F800T/800B Low V Write Inhibit CC To avoid initiation of a write cycle during V than 3.2 V (typically 3.7 V < are disabled. Under this condition the device will reset to the read mode. Subsequent ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature .................................................................................................– +125 C Ambient Temperature with Power Applied .................................................................– +85 C Voltage with respect to Ground All pins except A V (Note 1) ...............................................................................................................–2 +7 ...

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MBM29F800T/800B MAXIMUM OVERSHOOT +0.8 V –0.5 V –2.0 V Figure 1 Maximum Negative Overshoot Waveform +2.0 V Figure 2 Maximum Positive Overshoot Waveform +13.5 V +13 +0 ...

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DC CHARACTERISTICS • TTL/NMOS Compatible Parameter Parameter Description Symbol I LI Input Leakage Current I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active ...

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MBM29F800T/800B • CMOS Compatible Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs 9 I LIT Leakage Current I V Active Current (Note 1) CC CC1 V Active Current (Note ...

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AC CHARACTERISTICS • Read Only Operations Characteristics Parameter Symbols Description Stan- JEDEC dard t t Read Cycle Time AVAV RC Address to Output Delay t t AVQV ACC Chip Enable to Output Delay t t ELQV Output ...

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MBM29F800T/800B Device Under Test Note 100 pF including jig capacitance L • Write/Erase/Program Operations Alternate WE Controlled Writes Parameter Symbols JEDEC Standard t Write Cycle Time t AVAV WC Address Setup Time t t AVWL AS Address Hold ...

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Parameter Symbols JEDEC Standard t Read Recover Time Before Write t GHWL GHWL t CE Setup Time t CS ELWL Hold Time CH WHEH t Write Pulse Width t WP WLWH t Write Pulse Width High ...

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MBM29F800T/800B • Write/Erase/Program Operations Alternate CE Controlled Writes Parameter Symbols JEDEC Standard Write Cycle Time t t AVAV WC Address Setup Time t t AVEL AS t Address Hold Time t ELAX AH t Data Setup Time t DVEH DS ...

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SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM Addresses High-Z Outputs Figure 5 AC Waveforms for Read Operations MBM29F800T/800B INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from ...

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MBM29F800T/800B 3rd Bus Cycle Addresses 5555H A0H Data t DS 5.0V Notes address of the memory location to be programmed data to be programmed at byte ...

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Bus Cycle Addresses 5555H GHEL CPH t WS A0H Data t DS 5.0V Notes address of the memory location to be programmed ...

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MBM29F800T/800B Addresses 5555H CE t GHWL Data VCS Notes the sector address for Sector Erase. Addresses = 5555H (Word), AAAAH (Byte) for Chip Erase. 2. These waveforms ...

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OEH Valid Data (The device has completed the Embedded operation). *DQ 7 Figure 9 AC Waveforms for Data Polling during Embedded Algorithm Operations CE t ...

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MBM29F800T/800B CE WE RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations CE RY/BY RESET Figure 12 RESET/RY/BY Timing Diagram 36 The rising edge of the last WE signal Entire programming or erase operations t BUSY READY ...

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CE OE BYTE t ELFL t ELFH –1 Figure 13 BYTE Timing Diagram for Read Operations CE WE BYTE Figure 14 BYTE Timing Diagram for Write Operations MBM29F800T/800B Data Output Data Output ...

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MBM29F800T/800B SAX 12V VLHT 12V VLHT WE t CSP ...

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RESET RY/BY Figure 16 Temporary Sector Unprotection Enter Erase Embedded Suspend Erasing WE Erase Erase Suspend Read Toggle DQ2 and DQ6 with OE Note read from the ...

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MBM29F800T/800B EMBEDDED ALGORITHMS Increment Address *: The sequence is applied for x16 mode. The addresses differ from x8 mode. Figure 18 Embedded Programming Algorithm Table 9 Embedded Programming Algorithm Bus Operations Standby* Write Read Standby* *Device is either powered-down, erase ...

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EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 5555H/AAH 2AAAH/55H 5555H/AAH 2AAAH/55H *: The sequence is applied for x16 mode. The addresses differ from x8 mode. Figure 19 Embedded Erase Algorithm Table 10 Embedded Erase Algorithm Bus Operations Command Sequence Standby* ...

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MBM29F800T/800B Note rechecked even Start VA = Byte address for programming Read Byte ( Addr = VA Yes DQ = Data Yes ...

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Start Read Byte ( Addr = “H” or “L” Toggle Read Byte ( Addr = “H” or “L” Toggle 6 ? Fail Note: ...

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MBM29F800T/800B Increment PLSCNT No PLSCNT = 25? Yes Remove V from A ID Write Reset Command Device Failed *: byte mode Figure 22 Sector Protection Algorithm 44 Start Set Up Sector Addr (A , ...

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Start RESET = V (Note 1) Perform Erase or Program Operations RESET = V Temporary Sector Unprotection Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 23 Temporary Sector Unprotection ...

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MBM29F800T/800B ERASE AND PROGRAMMING PERFORMANCE Parameter Min. Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle 100,000 TSOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: ...

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... Reversed Thin Small Outline Pakage LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1994 FUJITSU LIMITED F48030S-1C-1 C MBM29F800T/800B * Resin Protrusin:(Each Side:0.15(.006)MAX) 48 Details of "A" part 0.15(.006) MAX 0.35(.014) "A" 0.15(.006) 0.25(.010 12.00± ...

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... MBM29F800T/800B 44-Pin Standard Thin Small Outline Pakage +0.25 28.45 1.120 –0.20 44 INDEX LEAD No. 1 1.27(.050)NOM 0.10(.004) 0.40 .016 26.67(1.050)REF 1994 FUJITSU LIMITED F44023S-1C +.010 –.008 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) "A" 22 +0.10 0(0)MIN –0.05 Ø0.13(.005) M +.004 (STAND OFF) – ...

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... Information sufficient for construction purposes is not nec- essarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu as- sumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu ...

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