ZEN2002AP Zenic, ZEN2002AP Datasheet
ZEN2002AP
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ZEN2002AP Summary of contents
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... Description ZENIC INC. ZEN2002AP bit pr ogr ble u n iver sa l cou LSI . TH E ZEN2002AP cou se-sh ift ed sign p/down pu lse sign a ls, gen coder s or lin ea r sca les. ...
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... Phase B/DN discrimi- Z/CLR nation RESET CLK VDD VSS Command register (8bit) Status register (8bit) Reference register (24bit) Comparator (24bit) Up/down counter (24bit) UP PULSE DOWN PULSE COUNTER CLEAR Preload register (24bit ZEN2002AP Interrupt control logic INT EQ Latch register (24bit) ZENIC Inc. ...
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... Phase distcrimination logic The count pulse for the up/down counter is generated from the input signal of A/UP(22Pin) and B/DN(21Pin). 9) Control logic The read/write timing control, the decoding about the command data, and the status flag control ZEN2002AP ZENIC Inc. ...
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... Selection up/down or phase-shifted pulse Coincidence detection output Coincidence detection output of count value and preset value of reference register. Interruption output When the coincidence of the count value and the preset value is detected, it outputs. It maintains to reset or the reset command execution. Power supply ( 5v ) Ground ( ZEN2002AP ZENIC Inc. ...
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... C C Operation Disable The data reading The data writing Status reading Command writing A/UP Up pulse Phase-A pulse : noamal transition : abnormal transition CCW (phase-B preceding Single nc nc Double Quad ZEN2002AP B/DN Down pulse Phase-B pulse ZENIC Inc. ...
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... Every time, phase-Z input is effective Single | Double | Quad (D) 0 ------------- A changeable edge is clear. 1 ------------- A fixed edge is clear (D). ------------------- Asynchronous clearness (D) ------------------- Synchronous clearness - - INT 0 ---- Interruption output disable (D) 1 ---- Interruption output enable - 6 - ZEN2002AP ( the pointer is automatically incremented ) ( the pointer is automatically incremented ) ZENIC Inc. ...
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... Up/down pulse input CLK A/UP B/DN Counter N N ------- INT = "L" ------- " = "H" ------------- Count value = preset value | 1 ------------- " 0 ------------------- Down count 1 ------------------- Up count " Data ready = "H" = "H" Z/CLR = "L" = "H" " detection N+1 N N+2 N " ZEN2002AP ZENIC Inc. ...
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... The data loading and latch operation timing CLK LD LT Counter L M(When the value of preload register is M) Latch N register direction CCW (phase-B preceding) start operation 0000H direction CCW (phase-B preceding) start operation 0000H start ZEN2002AP start 0000H start 0000H ZENIC Inc. ...
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... (group =0.0V V =5.0V (group Unit Unit V C Min. Typical Max. Unit 100 30 2 VDD 0 0.8 -10 10 -20 20 1.7 2.4 0.6 1.2 0.2 0.5 VDD - 0.6 0.4 0.4 - ZEN2002AP ZENIC Inc. ...
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... SZ t Asynchronous clear ZZ t Up/down mode UPH t " UPL t " DNH t " DNL t " UDS t load capacity 75pF INTF ZEN2002AP Min Max Unit ...
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... Read cycle C/D, D7~D0 Clock waveform CLK r f Reset waveform RESET LD (LT) t LDW (t LTW RST ) - 11 - ZEN2002AP C/D:"High" Status reading "Low" Data reading ZENIC Inc. ...
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... Up/down pulse input A/UP t DNH B/DN Output timing of EQ,INT signal CLK UDC (SP-1) (SP) EQ INT t PWABL t t SAB SAB SAB t t PWABH PWABL UPL UPH t DNL (SP+1) (SP+ EQF EQR t INTF - 12 - ZEN2002AP UDC:count value of up/down counter (SP):set value of reference register ZENIC Inc. ...
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... Application note Z80 8086 - 13 - ZEN2002AP ZENIC Inc. ...
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... Package Outlines( dimensions ‘ 13 25+ ZEN2002AP ZENIC Inc. ...
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... All r igh t r eser ved. Copyr igh t Zilog Inc . Motorola Inc . Intel Corp . ZENIC INC 1991, . ZENIC Inc p://www.zen ic.co.jp/ 1-17-14 iga 520-2144 +81-77-543-9431 ppor t @zen ic.co. ZEN2002AP ZENIC Inc. ...