ES1869S ESS Technology, Inc., ES1869S Datasheet
ES1869S
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ES1869S Summary of contents
Page 1
... Acoustic Echo Cancellation processing. ESS Technology, Inc. Advanced power management features include suspend/ resume from disk or host-independent self-timed power- down and automatic wake-up. The ES1869 is compliant to the ACPI standard. ...
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... IDE Interface Figure 1 Typical Application ES1869 DATA SHEET ® 95 and Windows ® 98 OS/2 Warp™ ® Left CD In Right AuxB In Left AuxB In Right Line In Left Line In Right Mic In To Stereo Amplifier DB155 To Modem Circuit IDE Connector ESS Technology, Inc. FEATURES ® ...
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... Card-Control Card-Level Registers (00h-07h Vendor-Defined Card-Level Registers (20h-29h Logical Device Registers . . . . . . . . . . . . . . . . . . . . . . . . 31 LDN 0: Configuration Device . . . . . . . . . . . . . . . . . 32 LDN 1: Audio Device . . . . . . . . . . . . . . . . . . . . . . . 33 LDN 2: Joystick Device . . . . . . . . . . . . . . . . . . . . . . 34 LDN 3: MPU-401 Device . . . . . . . . . . . . . . . . . . . . 35 ESS Technology, Inc. LDN 4: CD-ROM Device . . . . . . . . . . . . . . . . . . . . . 36 LDN 5: Modem Device . . . . . . . . . . . . . . . . . . . . . . 37 LDN 6: General-Purpose Device . . . . . . . . . . . . . . . 38 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Port Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Port Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Configuration Device . . . . . . . . . . . . . . . . . . . . . . . . 40 Audio Device ...
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... Table 16 Command Sequences for DMA Playback . . . . . . .50 Table 17 Command Sequence for DMA Record . . . . . . . . . .51 4 SAM0023-121997 MECHANICAL DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . 87 ES1869F PQFP Package . . . . . . . . . . . . . . . . . . . . . . . 87 ES1869S TQFP Package . . . . . . . . . . . . . . . . . . . . . . . 88 APPENDIX A: ES1869 PNP ROM DATA EXAMPLE . . . . . . 89 APPENDIX B: ES689/ES69X DIGITAL SERIAL INTERFACE 93 APPENDIX INTERFACE REFERENCE . . . . . . . . 94 2 APPENDIX D: MOTHERBOARD SCHEMATICS . . . . . . . . . 99 APPENDIX E: MOTHERBOARD BILL OF MATERIALS ...
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... ES1869S 100 Figure 3 ES1869S Pinout (TQFP Package) 51 AOUT_L 50 LINE_R 49 LINE_L 48 CIN_R 47 CIN_L 46 FOUT_L 45 FOUT_R 44 VDDA 43 CAP3D 42 GNDA 41 MIC 40 CMR 39 AUXA_R 38 AUXA_L ...
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... Filter output right. FOUT_R is AC-coupled externally to CIN_R to remove DC offsets. This output has an internal series resistor of about 5k ohms. A capacitor to analog ground on this pin can be used to create a low-pass filter pole that removes the switching noise introduced by the switched-capacitor filter. ES1869 DATA SHEET PIN DESCRIPTION ESS Technology, Inc. ...
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... ESS Technology, Inc. Filter output left. FOUT_L is AC-coupled externally to CIN_L to remove DC offsets. This out- put has an internal series resistor of about 5k ohms. A capacitor to analog ground on this pin can be used to create a low-pass filter pole that removes the switching noise introduced by the switched-capacitor filter. ...
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... Address input from the ISA bus. Active-low IDE interface chip select #0. Address input from the ISA bus. Active-low IDE interface chip select #1. Address input from the ISA bus. Active-low IDE data bus transceiver enable. ES1869 DATA SHEET PIN DESCRIPTION ESS Technology, Inc. ...
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... VOLUP MASTER VOL VOLDN CTRL MUTE MONO IN/OUT * Some of these pins are shared with other functions. ESS Technology, Inc. The major subunits of the ES1869 are shown in Figure 4 and described briefly in the following paragraphs. VDDD CIN FOUT CMR RECORD FILTER REF GEN ...
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... PCSPKO is intended to be externally mixed at the external amplifier. • Filter – switched capacitor low-pass filter. • General purpose I/O – outputs available to system software for power management or other applications. • Pre-amp – microphone pre-amplifier. ES1869 DATA SHEET ESS Technology, Inc. ...
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... DMA 1 digital audio DAC DMA 2 digital audio Preamp MIC LINE FM HWWT X DAC Mono_In AUXA AUXB ESS Technology, Inc. Output Volume Playback Mixer Record Mixer Input Volume Figure 5 ES1869 Mixer Schematic Block Diagram Record Monitor Off AOUT Master On Volume Record Source ...
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... Six ( active-high interrupt requests to the ISA bus. Unselected IRQ outputs are high-impedance. IRQs are software configurable. IORB ISA active-low read strobe. IOWB ISA active-low write strobe. RESET Active-high. Reset from ISA bus. 12 SAM0023-121997 Table 1 shows the pins used to interface the ES1869 to the ISA bus. ES1869 DATA SHEET BUS INTERFACING ESS Technology, Inc. ...
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... Programming DMA Transfers Programming data transfers can be complicated with the ES1869. Both Compatibility and Extended modes offer a variety of modes for conducting transfers. The commands ESS Technology, Inc. to enable the different transfers vary depending on which DMA channel and which mode (Compatibility or Extended) is used. ...
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... Data Transfers Using the Second Audio Channel The second audio channel is programmed using mixer registers 70h through 7Dh. The commands written to the mixer registers are written to the chip through ports Audio_Base+4h and Audio_Base+5h. ES1869 DATA SHEET DIGITAL AUDIO Use ES1869 port ESS Technology, Inc. ...
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... Use masking when DMA channels are shared to be sure that only one device has access to a given DMA channel at one time. ESS Technology, Inc. DRQ Latch Feature DRQ latching is enabled when bit 7 of PnP Vendor- Defined Card-Level register 25h is high. ...
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... Pop sounds may still occur if the DAC level was left at a value other than mid-level (code 80h on an 8-bit scale) by the previous play operation. To prevent this, always finish a DAC transfer with a command to set the DAC level to mid-range: 10h + 80h 16 SAM0023-121997 ES1869 DATA SHEET DIGITAL AUDIO ESS Technology, Inc. ...
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... Modem device is not active. Each interrupt also has one or more mask bits that are AND'ed with the interrupt request. ESS Technology, Inc. Interrupt Status Register Port Config_Base+6h of the configuration device can be read to quickly find out which ES1869 interrupt sources are active ...
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... part of the audio device, the interrupt can be assigned by writing to Vendor-Defined Card-Level register 28h. If this device is its own logical device assigned an interrupt by either register 28h or register 70h of LDN 3. ES1869 DATA SHEET INTERRUPTS ESS Technology, Inc. ...
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... When both MCLK and MSD are active, the stereo DACs that are normally used by the FM syn- thesizer are acquired for use by the external ES689/ ES69x. The normal FM output is blocked. ESS Technology, Inc. DSP Interface The ES1869 contains a synchronous serial interface for connection to a DSP serial interface. The typical application for this interface is a speakerphone ...
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... ES1869 DATA SHEET PERIPHERAL INTERFACING 16-bit Stereo DAC DAC DMA2 DAC FIFO 16-bit Stereo CODEC DAC DMA1 ADC FIFO DAC ADC Serializer/ Mixer Deserializer DSP/CODEC Port Figure 10 Default Mode and DSP digital audio ESS Technology, Inc. Microphone FDXO Speaker data is ...
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... The volume of the DSP digital audio playback is controlled within the DSP by scaling the data. Serial Data Format Figure 11 shows the format for serial data used with the DSP serial interface. DCLK FSR or FSX Hi ESS Technology, Inc. D15 D14 D13 D12 (MSB) D15 D14 D13 D12 (MSB) ...
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... ISA data bus. This pin is active-low when CDCSB0, CDCSB1 DMA -DACK is active-low. ES1869 RSTB CDCSB0 74LS245 CDCSB1 CDIRQ EN CDENBL DIR SD[15:8] -IOR -IOW SA[2:0] -IOCS16 IOCHRDY ESS Technology, Inc. -DACK ...
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... D-sub connector. It supports all standard PC joystick-compatible software. If the system already has a game card or port, either remove the game card or disable ESS Technology, Inc. the joystick port in the reference design by removing the joystick enable jumper. Disabling the joystick port does not affect its use as a MIDI port ...
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... C1 J1 220pF MIDI OUT MIDI IN Sync Byte Mapping for IRQB/A Mapping for IRQD/C Mapping for IRQF/E Mapping for DRQB/A Mapping for DRQD/C Miscellaneous Miscellaneous 93LC66 (512K x 8-bit serial EEPROM) DI SEDI/VOLUP DO SEDO/VOLDN CLK SECLK/MUTE CS SECS/PSEL mute vol down vol up ESS Technology, Inc ...
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... DSP serial interface is enabled, the right channel DAC output can be the digitized serial data received from the DSP. ESS Technology, Inc. When bit and bit MONO_OUT is a buffered version of the second channel, right channel DAC. In this case, the second channel DMA can play digitized audio through MONO_OUT ...
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... This circuit provides a clean analog signal. The output can be either mixed with the AOUT_L and AOUT_R pins externally or it can be used to drive a simple transistor amplifier to drive an 8 ohm speaker dedicated to producing beeps. ES1869 DATA SHEET .1 F 500 GNDA ESS Technology, Inc. ...
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... Reference generator pin CMR is shown bypassed to analog ground. ES1869 CMR Figure 18 Reference Generator Pin Diagram ESS Technology, Inc. Switch-Capacitor Filter The outputs of the FOUT_L and FOUT_R filters must be AC-coupled to the inputs CIN_L and CIN_R. This provides for DC blocking and an opportunity for low-pass filtering with capacitors to analog ground at these inputs ...
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... Reserved <config_address_low>, <config_address_high> 8 bits Register 25h, bits 6:5 = 0,1 0 67, a0, c3, f0, eb, e6, 70, ab c6, 62, 32, 1a, a5, 51, 29, 17, 9a, 4c, b7, c8 f5, 79, 3f, 8c, d7, fa, 7e, 3c <config_address_low>, <config_address_high> ES1869 DATA SHEET PNP CONFIGURATION AND REGISTERS d, 96, db 97, da, 6c ESS Technology, Inc. ...
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... WFK WAIT_FOR_KEY command Enter wait-for-key state. 0 SWR Software reset command. Does not work in wait-for-key state Reset config registers to default. ESS Technology, Inc. Wake[CSN data written is 00h and it: • matches the CSN: this card goes from Sleep mode to Isolation mode. • ...
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... DMA mask Description 1 = Enable external DMA mask Disable Enable audio 2 DMA mask Disable Enable audio 1 DMA mask Disable GPO1 pin is external DACK, GPI is external DRQ GPO1 pin is GPO1 GPO0 pin is GPCS GPO0 pin is GPO0. ESS Technology, Inc. (25h, R) MPU-401 0 (26h ...
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... Bit Definitions: Bits Name Description 0 PnP 1 = PnP enabled. enable 0 = PnP disabled. The ES1869 will not respond to any PnP commands. This bit is set high by hardware reset. ESS Technology, Inc. (27h, R) Logical Device Registers Table 11 Logical Device Summary LDN # LDN 0 (mandatory) 30h Activate ...
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... A[11: (61h, R) A[7: (74h Data Description Select which channel is in use for DMA 0. (75h Data Description Select which channel is in use for DMA 1. ESS Technology, Inc ...
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... I/O base address of audio processor, bits 7:4. FM Alias I/O Base Address I/O base address of FM alias, bits 11:8. Four locations. ESS Technology, Inc. FM Alias I/O Base Address 7 I/O base address of FM alias, bits 7:2. MPU-401 I/O Base Address (30h, R/ Activate I/O base address of MPU-401, bits 11:8. (MPU-401 may also be accessible through LDN 3) ...
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... PNP CONFIGURATION AND REGISTERS (30h, R/ Description 1 = Activate Deactivate (default). (31h Enable range check Pattern select Description 1 = Enable range check Disable 55h AAh. (60h, R/ A[11: (61h, R/W) A[7: ESS Technology, Inc. Activate ...
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... Interrupt request MPU select. Bit Definitions: Bits Name Description 3:0 Data Select which interrupt used for MPU IRQ. ESS Technology, Inc. Interrupt Request Type Select 0 0 solution. ® 7 (30h, R/W) Interrupt request type select 0. Returns 2 (low-to-high transition Activate ...
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... Description Select which interrupt used for CD-ROM IRQ Description Select which DMA channel is in use for CD-ROM DRQ. ESS Technology, Inc. (63h, R/ (70h, R/ (71h (74h, R) Data 1 0 ...
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... Interrupt request modem select. Bit Definitions: Bits Name Description 3:0 Data Select which interrupt used for modem IRQ. ESS Technology, Inc. Interrupt Request Type Select (30h, R/W) Interrupt request type select 0. Returns 2 (low-to-high 0 0 Activate transition DMA Channel Select for Modem ...
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... Description Select which interrupt used for general-purpose device IRQ Description Select which DMA channel is in use for general- purpose device DRQ. ESS Technology, Inc. (70h, R/ (71h (74h, R) Data 1 0 ...
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... FM Device Base+0h - Base+3h Read/write MPU-401 Device Base+0h - Base+1h Read/write Joystick Device Base+0h Read/write ESS Technology, Inc. Configuration Register Address. Configuration Register Data. EEPROM Data register. EEPROM Command register. Reset EEPROM Address. Status register. Interrupt Status register. Interrupt Mask register. 20-voice FM synthesizer. Address and data registers. ...
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... Audio 2. Audio 2 interrupt request AND’ed with bit 6 of mixer register 7Ah. Audio 1. Audio 1 interrupt request. (Config_Base+7h, R/ Description General-Purpose interrupt mask bit. Modem interrupt mask bit. Hardware volume interrupt mask bit. Audio 2 interrupt mask bit. Audio 1 interrupt mask bit. ESS Technology, Inc. I/O PORTS ...
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... It is also set high if the ES689/ ES69x serial interface is active, which is a combination of bit 4 of mixer register 48h set high and MCLK (ES689/ ES69x serial bit clock) being high periodically. ESS Technology, Inc. Bit Definitions: Bits Name 7 Act flag 2 Set low by I/O reads/writes to MPU-401 or FM ...
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... Data not available in read buffer. This flag is reset by a read from port Audio_Base+Ah. (Audio_Base+Fh, R/ (FM_Base+0h, R) FT1 FT2 (FM_Base+0h ESS Technology, Inc. I/O PORTS ...
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... Reset/return to Smart mode. This command generates an acknowledge byte if received when already in Smart mode. 3Fh Go to UART mode. This command generates an acknowledge byte if received while in Smart mode ignored if the device is already in UART mode. ESS Technology, Inc. (FM_Base+1h, W) MPU-401 Status -RR 2 ...
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... DMA control is handled by dedicated logic. Programming for Extended mode operation requires accessing various control registers with ES1869 commands. Some of these commands are also useful for Compatibility mode, such as those that configure DMA and IRQ channels. ES1869 DATA SHEET ESS Technology, Inc. ...
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... The first block of a multiple-block transfer uses a different command than subsequent blocks. The first byte of the first block is called the reference byte. Use Compatibility mode when transferring compressed data. ESS Technology, Inc. Compatibility Mode (Sound Blaster Pro) Yes 64 bytes (firmware managed) ...
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... Set sample rate and filter clock. Use commands 40h or 41h to set the sample rate and filter clock divider. To set the filter clock to be independent from the sample rate, use command 42h in addition to 40h or 41h. ES1869 DATA SHEET PROGRAMMING THE ES1869 13 sec ESS Technology, Inc. ...
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... Commands such as D1h and D3h, which control the Audio 1 DAC mixer input enable/disable status, and command D0h, which suspends DMA, are acceptable to send during DMA transfers. These commands can ESS Technology, Inc. only be sent during certain windows of opportunity. See “Stereo DMA Transfers in Compatibility Mode” on page 45. ...
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... ES1869 controller registers. Writing Commands to ES1869 Controller Registers Commands written to the ES1869 enter a write buffer. Before writing the command, make sure the buffer is not busy. ES1869 DATA SHEET PROGRAMMING THE ES1869 sent to ports Audio_Base+Ch ESS Technology, Inc. and ...
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... Audio_Base+Ch, which is the same flag. The Read-Data-Buffer-Status flag is cleared automatically by reading the byte from port Audio_Base+Ah. ESS Technology, Inc. Extended Mode Audio 1 DAC Operation Follow the steps below to program the first audio channel for Extended mode DAC operation: 1 ...
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... Microphone input is the default after any reset. Select the source using the mixer control register 1Ch. 4. Program input volume register B4h. 5. Program direction and type: registers B8h, and A8h: ES1869 DATA SHEET PROGRAMMING THE ES1869 ESS Technology, Inc. ...
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... Initialize and configure ADC: register B7h. See Table 17. The first command sent to register B7h initializes the DAC and prevents pops. Register B7h: programs the FIFO (16-bit/8-bit, signed/ unsigned, stereo/mono). ESS Technology, Inc. Table 17 Command Sequence for DMA Record Mono Stereo 8-bits 16-bits Unsigned Signed X X ...
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... Register 78h: set bit 4 low for Normal DMA mode, high for Auto-Initialize DMA mode. Bits 7:6 00: Single Transfer DMA Bits 7:6 01: Demand Transfer DMA: 2 bytes per DMA request. Bits 7:6 10: Demand transfer DMA: 4 bytes per DMA request. Bits 7:6 11: Demand transfer DMA: 8 bytes per DMA request. ES1869 DATA SHEET ESS Technology, Inc. ...
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... Audio 2 DAC input to the mixer. 11. Finally: Issue another software reset to the ES1869 to initialize the appropriate registers. ESS Technology, Inc. Full-Duplex DMA Mode (No DSP Serial Port) The ES1869 supports stereo full-duplex DMA. In full- duplex (FD) mode, a second audio channel has been added to the ES1869 ...
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... The mixer registers are not affected by software reset. To reset the registers to initial conditions, write any value to mixer register 00h: 1. Write 00h to Audio_Base+4h (select mixer register to 00h). 2. Write 00h to Audio_Base+5h (write 00h to the selected mixer register). ES1869 DATA SHEET its address to ESS Technology, Inc. ...
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... Since this is a mono control, panning is not supported. For extended access, use register address 1Ah instead. Register 1Ah offers 4 bits-per-channel for pan control of the mono microphone input to the mixer. ESS Technology, Inc. Mic Mix Volume Mic mix volume left 7 Access to register 1Ah through address 0Ah is mapped as ...
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... ES1869 DATA SHEET PROGRAMMING THE ES1869 Mute 6-Bit Volume ESS Technology, Inc ...
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... D3 (off) Sound Blaster commands Telegaming mode (enabled by bit 0 of mixer register 48h when in Serial mode), the audio 2 DAC mixer input volume is slaved to the audio 1 DAC mixer input volume. ESS Technology, Inc. Table 22 Mixer Input Volume Registers Mixer Input Audio 1 ...
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... Mixer Registers There are two types of mixer registers. Sound Blaster Pro Compatible mixer registers are fully compatible with the Sound Blaster Pro. ESS mixer registers are specific to ESS Technology, Inc. ES1869 AudioDrive are shared throughout the AudioDrive Sound Blaster Pro Compatible Mixer Registers This section provides a summary of Sound Blaster Pro compatible mixer registers in the ES1869 and some comments on the characteristics of these registers ...
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... Clear hardware volume interrupt request 68h Mic record volume left 69h Audio 2 record volume left 6Ah AuxA (CD) record volume left 6Bh Music DAC record volume left ESS Technology, Inc Write: reset mixer Audio 1 play volume right Mic mix volume right Mute F0 ...
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... Sound Blaster Filter Control bit F1 has no equivalent function in the ES1869 and is ignored Mutes the input to the filters for recording. This does not affect MONO_OUT. Sound Blaster Filter Control bit F0 has no equivalent function in the ES1869 and is ignored. ESS Technology, Inc. REGISTERS (1Ch, R/ ...
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... AuxB volume left reset, this register assumes the value of 00h. ESS Technology, Inc. PC Speaker Volume Register 7 On reset, this register assumes the value of 04h. Line Volume Register Line volume left 7 On reset, this register assumes the value of 00h. ...
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... Game and Telephony mode disabled. In Serial mode, the first channel DMA does not get played. The second channel DMA is connected to the second channel DAC as usual. Reserved. Always write 0. ESS Technology, Inc. REGISTERS (48h, R/W) Enable 1st DMA in 0 SMODE ...
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... Internal Serial Clock 1.591 MHz/2/41 = 19.4 kHz for 44,100 Sample Rate. Note that the sample rate divider is an integer multiple of the fil- ter divide for 44,100, which gives maximum per- formance of DACs and ADCs. ESS Technology, Inc. (4Ah, R/W) Serial Mode Format/Source/Target TX 2 ...
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... ES1869 DATA SHEET REGISTERS (60h, R/W) Left master volume (62h, R/W) Right master volume (61h, R/W) Left volume counter (63h, R/W) Right volume counter counters and mute ESS Technology, Inc the ...
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... When high, the Sound Blaster Pro master volume registers are, in effect, read-only. This bit is cleared by hardware reset. ESS Technology, Inc. (64h, R/W) Opamp Calibration Control HMV int Disable SB Pro master mask ...
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... Normal mode. After the transfer counter rolls over reloaded but DMA stops. Bit 1 of this register is cleared. The 2nd channel interrupt flag will be set high. Reserved. Always write 0. ESS Technology, Inc. REGISTERS (72h, R/ (74h, R/W) ...
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... Mic Preamp, MONO_IN and MONO_OUT Enable MONO_OUT +26 dB mic source select amp This register is reset to 08h by hardware reset. ESS Technology, Inc. Bit Definitions: Bits Name 7 Enable +26 dB mic amp 2:1 MONO_OUT source select (7Ah, R/W) stereo/ 16-bit/ Signed mono 8-bit ...
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... Adjust magnitude adjust Right channel ADC offset Adjust magnitude adjust Description 1 = clock source is 795.5 kHz for sample rates higher than 22 kHz clock source is 397.7 kHz for sample rates lower than or equal to 22 kHz. Signed sample rate divider. ESS Technology, Inc. REGISTERS ...
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... For Normal mode DMA, DMA requests are halted at the time that the counter overflows, until a new DMA transfer is commanded by the system processor. Again, an interrupt request is generated to the system processor if bit 6 of register B1h is set high. ESS Technology, Inc. (A2h, R/W) Analog Control 0 0 ...
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... DAC direct access holding – low byte DAC direct access holding – high byte ESS Technology, Inc. REGISTERS (B5h, R/ (B6h, R/ ...
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... DMA mode. 1 DMA read 1 = first DMA is read (e.g. for ADC operation). enable 0 = first DMA is write (e.g. for DAC operation). 0 DMA First DMA active-low reset. When high, first transfer DMA is allowed to proceed. enable ESS Technology, Inc. (B7h, R/W) Audio 1 Transfer Type 0 0 FIFO Generate 7 6 16-bit ...
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... With this average DC offset, calculate the best digital offset to bring the sum closest to zero, using the codes and offsets listed in the table above. Offset -64 -128 -192 -256 -320 -384 -448 -512 -576 -640 -704 -768 -832 -896 -960 -1024 ES1869 DATA SHEET REGISTERS ESS Technology, Inc. ...
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... Filter clock rate: rate = 7.16E6 / (256-X) The relationship between the low-pass filter -3 dB point and the filter clock rate is approximately 1:82. 48h 2 writes Set block size-1 for high speed mode and auto-init mode transfer, least byte first. ESS Technology, Inc. SAM0023-121997 73 ...
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... DMA transfer to DAC. Data is transfer count - 1, ® 2.5-bit (high compression) format DMA transfer to DAC. Data is transfer count - 1, least ® 4.3-bit (low compression) format ADC, compression, and DMA transfer. Data is transfer ES1869 DATA SHEET ESS Technology, Inc. ...
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... Returns bytes 68h 8xh, where x is the version code. The version code less than 8 for the ES688, and greater than or equal to 8 for a device such as the ES1869. Use mixer register 40h to properly identify the ES1869 (page 61). F2h Generate an interrupt for test purposes. FDh Forces power-down. Software or hardware reset. Required for wake-up. ESS Technology, Inc. SAM0023-121997 75 ...
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... LINE_R, and MIC audio sources can continue to be heard. FM and DAC audio are automatically muted. No pops should occur when returning from partial power-down to full power-up state. ES1869 DATA SHEET POWER MANAGEMENT Notes All inputs static at VDDD or GND. Digital standby. Normal operating conditions. ESS Technology, Inc. ...
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... Audio_Base+7h, then pulsing bit 2 high, then low. The other bits of this register should be preserved. The ES1869 processor sees the rising edge of bit 2 of port Audio_Base+ interrupt request to power- down. ESS Technology, Inc. Waking from Partial Power-Down Any I/O activity, ...
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... During start-up, program the ES1869 so that GPO0 is high when powered-up and low when fully powered-down. Program a delay of about 133 milliseconds between power-down and power-up states, before GPO0 returns high, to allow the ES1869 analog circuits to stabilize. ES1869 DATA SHEET POWER MANAGEMENT ESS Technology, Inc. ...
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... A controller register in the ES1869 must be programmed to enable this feature. Specifically, the GPO Power-Down ESS Technology, Inc. Control register is set by writing the command CFh to port Audio_Base+Ch followed by the data. To read the GPO Power-Down Control register write the command CEh to ...
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... VDDD = min VDDD = min 0.8 V VDDD = max 0.4 V IOL = 4 mA, VDDD = min IOH = -3 mA, VDDD = max 0.4 V IOL = 16 mA, VDDD = min IOH = -12 mA, VDDD = max Typ Max Unit (conditions) 2.25 volts 125k ohms 50k 65k ohms 5k 6.5k ohms 10k ohms 125 mVp-p 2.8 Vp-p 3.4 Vp-p VDDA-1.0 Vp-p 26 decibels ESS Technology, Inc. ...
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... ES1869 DATA SHEET TIMING DIAGRAMS TIMING DIAGRAMS RESET AEN, A[9:0] IORB D[7:0] AEN, A[9:0] IOWB D[7:0] ESS Technology, Inc Figure 23 Reset Timing Figure 24 I/O Read Cycle Figure 25 I/O Write Cycle SAM0023-121997 81 ...
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... DRQ AEN DACKB IORB D[7:0] 82 SAM0023-121997 Figure 26 Compatibility Mode DMA Write Cycle Figure 27 Compatibility Mode DMA Read Cycle ES1869 DATA SHEET TIMING DIAGRAMS ESS Technology, Inc ...
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... ES1869 DATA SHEET TIMING DIAGRAMS AEN A[11:0] IOWB GPO0 GPO1 AEN A[11:0] CDCSB0 CDCSB1 CDENB MMCSB DCLK FSR DR ESS Technology, Inc Figure 28 Miscellaneous Output Signals D15 D14 t 22 Figure 29 Serial Mode Receive Operation ...
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... FSX DX IISLR IISCLK IISDATA 84 SAM0023-121997 D15 D14 t 24 Figure 30 Serial Mode Transmit Operation Figure 31 Serial Input Timing for I S Interface 2 ES1869 DATA SHEET TIMING DIAGRAMS ESS Technology, Inc. ...
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... ES1869 DATA SHEET TIMING DIAGRAMS IISCLK IISLR LEFT R0* L15 IISDATA * Note: LSB of right channel, previous sample. Figure 32 I ESS Technology, Inc. L14 L13 L12 L0 R15 R14 S Digital Input Format with 16 SCLK Periods 2 RIGHT R0 R13 R12 R11 R10 SAM0023-121997 85 ...
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... TIMING CHARACTERISTICS Min Typ Max Units 300 ns 100 14.318 MHz DCLK 1 DCLK 500 ns 2.04 MHz ESS Technology, Inc ...
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... Package’s outside, X-axis E Lead to lead, Y-axis E1 Package’s outside, Y-axis A1 Board standoff A2 Package thickness Lead length - - - Leads in X-axis - Leads in Y-axis - - Package type ESS Technology, Inc Description Min 23.65 19.90 17.65 13.90 0.10 2.57 Lead width 0.20 Lead pitch - Lead gap 0.24 Foot length 0.65 1.88 Foot angle 0° Coplanarity - ...
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... Leads in Y-axis - - Package type 88 SAM0023-121997 A2 A1 Description Min 15.75 13.90 15.75 13.90 0.05 1.35 Lead width 0.17 Lead pitch - Lead gap 0.24 Foot length 0.45 Lead length 0.93 Foot angle 0° Coplanarity - - - Total leads - - Figure 34 ES1869S TQFP Mechanical Dimensions ES1869 DATA SHEET MECHANICAL DIMENSIONS Millimeters Nom Max 16.00 16.25 14.00 14.10 16.00 16.25 14.00 14.10 0.10 0.15 1.40 1.45 0.22 0.27 0. 0.60 0.75 1.00 1.07 7° - 0.102 ...
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... ESS Technology, Inc. NOTE: Contact your ESS sales representative or FAE for the most current EPROM data code for your hardware design. ; PNP OK byte ...
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... DMA 1: DRQ INT 0: IRQ 10, 11 DMA 0: DRQ DMA 1: DRQ INT 0: IRQ 10, 11 DMA 0: DRQ DMA 1: DRQ INT 0: IRQ 10, 11 end configurations ES1869 DATA SHEET ESS Technology, Inc. ...
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... Basic configuration 0003 031H, 001H 022H, 000H, 010H 047H, 001H, 0E8H, 001H, 0E8H, 001H, 000H, 008H ; 1E8 8 bytes 047H, 001H, 0EEH, 003H, 0EEH, 003H, 000H, 002H ; 3EE 2 bytes ESS Technology, Inc. ; end dependent functions ; Compatible ID: PNPB02F ; IRQ IRQ IRQ 12 ...
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... SAM0023-121997 APPENDIX A: ES1869 PNP ROM DATA EXAMPLE ; IRQ end dependent functions ; Compatible ID: PNP0600 ; end tag + checksum ES1869 DATA SHEET ESS Technology, Inc. ...
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... MSD Format: 16 bits, unsigned (offset 8000h), MSB first MSD changes after rising edge of MCLK. Hold time relative to MCLK rising edge is 0-25 nanoseconds. ESS Technology, Inc. The ES689/ES69x can be programmed to enter Activity- Detect mode using system exclusive command 4. For more information on system exclusive commands, see the appropriate ES689/ES69x Data Sheet ...
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... PC CARD SLOT AUDIO CODEC PCM 19 AUDIO INPUT 4 MOTHERBOARD Figure 35 Example ZV Port Implementation ES1869 DATA SHEET APPENDIX INTERFACE REFERENCE 2 PC CARD AUDIO 4 PCM CONVERTER PC CARD VIDEO INTERFACE DECODER NTSC/PAL RF SIGNAL 19 VIDEO & CONTROL ESS Technology, Inc. AUDIO INPUT VIDEO INPUT ...
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... The Master Clock (MCLK) is used to operate the digital interpolation filter and the delta-sigma modulator. NOTE: MCLK is not required in some I PC CARD Audio Data Processor External Clock ESS Technology, Inc. Table 30 Common Clock Frequencies LRCLK (KHz format. The audio designs ...
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... S LRCLK (kHz) Sample Frequency 44.1 ES1869 DATA SHEET APPENDIX INTERFACE REFERENCE SCLKh SCLKl Min SCLK (MHz 0.704 32 1.0240 1.4112 48 1.5360 ESS Technology, Inc. MCLK (MHz) 384x Fs 8.448 12.2880 16.9344 18.4320 ...
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... S ZV INTERFACE REFERENCE Format 2 The format is shown in Figure 38 below. The digital audio data is left-channel MSB-justified to the high-to-low going edge of the LRCLK plus one SCLK delay. LRCLK SCLK SDATA Figure 38 I ESS Technology, Inc. Left Channel . . . . . . ...
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... Video Data to ZV Port YUV:4:2:2 format O Video Data to ZV Port YUV:4:2:2 format O Video Data to ZV Port YUV:4:2:2 format O Video Data to ZV Port YUV:4:2:2 format O Video Data to ZV Port YUV:4:2:2 format O Audio LRCLK PCM Signal O Audio PCM Data Signal ESS Technology, Inc. ...
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... ES1869 DATA SHEET APPENDIX D: MOTHERBOARD SCHEMATICS APPENDIX D: MOTHERBOARD SCHEMATICS ESS Technology, Inc. Figure 39 ES1869 – Motherboard Configuration SAM0023-121997 99 ...
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... Figure 40 ES1869 and ES692 – Motherboard Configuration 100 SAM0023-121997 ES1869 DATA SHEET APPENDIX D: MOTHERBOARD SCHEMATICS ESS Technology, Inc. ...
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... ES1869 DATA SHEET APPENDIX D: MOTHERBOARD SCHEMATICS ESS Technology, Inc. Figure 41 Amplifier – Motherboard Configuration SAM0023-121997 101 ...
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... SAM0023-121997 Figure 42 PC Interface – Motherboard Configuration ES1869 DATA SHEET APPENDIX D: MOTHERBOARD SCHEMATICS ESS Technology, Inc. ...
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... F 0 ohm 3.5 mm Stereo Jack DB15S 4x1 Header 13x2 Header optional wavetable connector 2x1 Header 3x1 Header 6x2 Header 3x2 Header Ferrite Bead 7.5K 2.2K 1K 470 ohm 22K 33K 820K 2.7 ohm 100K 10K 1M 0 ohm 220K Pushbutton 78L05 ES1869F/ES1869S 93LC66 LM1877 SAM0023-121997 103 ...
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... C51 46 1 C52 47 2 C53,C55 48 1 C54 49 3 C58,C59,C60 50 1 R43 104 SAM0023-121997 ES1869 DATA SHEET APPENDIX E: MOTHERBOARD BILL OF MATERIALS Part 14.318 MHz ES692-TQFP100 LT1129-3.3 33.000 MHz 1 .001 47K 2.2 H ESS Technology, Inc. ...
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... ES1869 DATA SHEET APPENDIX F: SOUND CARD SCHEMATICS APPENDIX F: SOUND CARD SCHEMATICS ESS Technology, Inc. Figure 43 ES1869 – Sound Card Configuration SAM0023-121997 105 ...
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... Figure 44 ES1869 and ES692 – Sound Card Configuration 106 SAM0023-121997 ES1869 DATA SHEET APPENDIX F: SOUND CARD SCHEMATICS ESS Technology, Inc. ...
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... ES1869 DATA SHEET APPENDIX F: SOUND CARD SCHEMATICS ESS Technology, Inc. Figure 45 Amplifier – Sound Card Configuration SAM0023-121997 107 ...
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... SAM0023-121997 Figure 46 PC Interface – Sound Card Configuration ES1869 DATA SHEET APPENDIX F: SOUND CARD SCHEMATICS ESS Technology, Inc. ...
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... WITH OPTIONAL ES692 WAVETABLE MUSIC SYNTHESIZER: ESS Technology, Inc. Part .1 F .22 F .001 F 680 pF .047 .01 F 150 pF 470 F 100 F 0 ohm 3.5 mm Stereo Jack DB15S 4x1 Header 13x2 Header optional wavetable connector ...
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... Item Quantity Reference C51 44 1 C52 45 2 C53,C55 46 1 C54 47 3 C56,C57,C58 48 1 R39 110 SAM0023-121997 ES1869 DATA SHEET APPENDIX G: SOUND CARD BILL OF MATERIALS Part ES692-TQFP100 LT1129-3.3 33.000 MHz 1 .001 47K 2.2 H ESS Technology, Inc. ...
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... Figure 48 Analog Components on Both Sides of the PCB Special Notes The analog traces should be placed as short as possible. The MIC-IN circuit is the most sensitive of the audio circuits, and requires proper and complete shielding. ESS Technology, Inc. There are two possible placements for these audio components: A grouped on one side of the PCB ...
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... All specifications are subject to change without prior notice. ESS Technology, Inc. assumes no responsibility for any errors contained herein. © 1997 ESS Technology, Inc. All rights reserved. ES1869 DATA SHEET APPENDIX H: LAYOUT GUIDELINES (P) U.S. Patent 4,214,125 and others, other patents pending. ...