KM44V16004CK-6 Samsung, KM44V16004CK-6 Datasheet

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KM44V16004CK-6

Manufacturer Part Number
KM44V16004CK-6
Description
16M x 4-Bit CMOS Dynamic RAM with Extended Data Out
Manufacturer
Samsung
Datasheet
1.KM44V16104CS-6.pdf (21 pages)
KM44V16004C,KM44V16104C
• Performance Range
This is a family of 16,777,216 x 4 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5, or -6), power consumption(Normal
or Low power) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh
capabilities. Furthermore, Self-refresh operation is available in L-version. This 16Mx4 EDO Mode DRAM family is fabricated using Sam-
sung s advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Part Identification
• Refresh Cycles
* Access mode & RAS only refresh mode
• Active Power Dissipation
KM44V16004C*
KM44V16104C
Speed
CAS-before-RAS & Hidden refresh mode
- KM44V16004C/C-L(3.3V, 8K Ref.)
- KM44V16104C/C-L(3.3V, 4K Ref.)
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
-45
-5
-6
Speed
-45
Part
NO.
-5
-6
45ns
50ns
60ns
t
RAC
Refresh
cycle
12ns
13ns
15ns
8K
4K
16M x 4bit CMOS Dynamic RAM with Extended Data Out
t
324
288
252
CAC
8K
Normal
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
64ms
104ns
74ns
84ns
t
Refresh time
RC
432
396
360
Unit : mW
4K
128ms
L-ver
17ns
20ns
25ns
t
HPC
DESCRIPTION
(A0~A11)*1
(A0~A11)*1
A0~A12
A0~A10
RAS
CAS
W
FUNCTIONAL BLOCK DIAGRAM
• Extended Data Out Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic SOJ and TSOP(II) packages
• +3.3V 0.3V power supply
Note) *1 : 4K Refresh
Control
Clocks
Row Address Buffer
Col. Address Buffer
Refresh Counter
Refresh Control
Refresh Timer
VBB Generator
Column Decoder
16,777,216 x 4
Memory Array
Row Decoder
Cells
CMOS DRAM
Vcc
Vss
Data out
Data in
Buffer
Buffer
DQ0
DQ3
to

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KM44V16004CK-6 Summary of contents

Page 1

... SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. DESCRIPTION • Extended Data Out Mode operation • CAS-before-RAS refresh capability • RAS-only and Hidden refresh capability • Self-refresh capability (L-ver only) • Fast parallel test mode capability • ...

Page 2

KM44V16004C,KM44V16104C •KM44V160(1)04CK DQ0 2 DQ1 3 N.C 4 N.C 5 N RAS 400mil SOJ) ...

Page 3

KM44V16004C,KM44V16104C ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage Temperature Power Dissipation Short Circuit Output Current * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are ...

Page 4

KM44V16004C,KM44V16104C DC AND OPERATING CHARACTERISTICS Symbol Power I Don t care CC1 Normal I Don t care CC2 L I Don t care CC3 I Don t care CC4 Normal I Don t care CC5 L I Don t care ...

Page 5

KM44V16004C,KM44V16104C CAPACITANCE (T = Parameter Input capacitance [A0 ~ A12] Input capacitance [RAS, CAS, W, OE] Output capacitance [DQ0 - DQ3] AC CHARACTERISTICS ( Test condition : V =3.3V 0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V CC Parameter Random ...

Page 6

KM44V16004C,KM44V16104C AC CHARACTERISTICS (Continued) Parameter Data hold time Refresh period (Normal) Refresh period (L-ver) Write command set-up time CAS to W delay time RAS to W delay time Column address to W delay time CAS set-up time (CAS -before-RAS refresh) ...

Page 7

KM44V16004C,KM44V16104C TEST MODE CYCLE Parameter Random read or write cycle time Read-modify-write cycle time Access time from RAS Access time from CAS Access time from column address RAS pulse width CAS pulse width RAS hold time CAS hold time Column ...

Page 8

KM44V16004C,KM44V16104C NOTES 1. An initial pause of 200us is required after power-up followed by any 8 RAS-only or CAS-before-RAS refresh cycles before proper device operation is achieved. 2. Input voltage levels are Vih/Vil. V times are measured between V 3. ...

Page 9

KM44V16004C,KM44V16104C READ CYCLE RAS CAS ASR ...

Page 10

KM44V16004C,KM44V16104C WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CAS ASR ...

Page 11

KM44V16004C,KM44V16104C WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CAS ASR ADDRESS ...

Page 12

KM44V16004C,KM44V16104C READ - MODIFY - WRITE CYCLE RAS CRP CAS ASR ROW A ADDR ...

Page 13

KM44V16004C,KM44V16104C HYPER PAGE READ CYCLE RAS CRP CAS ASR ROW A ADDR ...

Page 14

KM44V16004C,KM44V16104C HYPER PAGE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP CAS ASR RAH ROW A ...

Page 15

KM44V16004C,KM44V16104C HYPER PAGE READ-MODIFY-WRITE CYCLE RAS CRP CAS RAD t ASR t ASC ROW A ADDR ...

Page 16

KM44V16004C,KM44V16104C HYPER PAGE READ AND WRITE MIXED CYCLE RAS CAS t RAD RAH t ASR ROW A ADDR ...

Page 17

KM44V16004C,KM44V16104C RAS - ONLY REFRESH CYCLE* NOTE : W, OE Don t care OPEN OUT RAS CRP CAS ASR RAH ...

Page 18

KM44V16004C,KM44V16104C HIDDEN REFRESH CYCLE ( READ ) RAS CRP CAS ASR ADDRESS ...

Page 19

KM44V16004C,KM44V16104C HIDDEN REFRESH CYCLE ( WRITE ) NOTE : D = OPEN OUT RAS CAS ASR ...

Page 20

KM44V16004C,KM44V16104C CAS - BEFORE - RAS SELF REFRESH CYCLE NOTE : OE Don t care RAS CAS DQ0 ~ DQ3(7) t CEZ ...

Page 21

KM44V16004C,KM44V16104C PACKAGE DIMENSION 32 SOJ 400mil #32 #1 0.0375 (0.95) 0.050 (1.27) 32 TSOP(II) 400mil 0.037 (0.95) 0.050 (1.27) 0.841 (21.36) MAX 0.820 (20.84) 0.830 (21.08) 0.026 (0.66) 0.032 (0.81) 0.015 (0.38) 0.021 (0.53) 0.841 (21.35) MAX 0.821 (20.85) 0.047 ...

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