MBM29F200TA-70PFTN Fujitsu, MBM29F200TA-70PFTN Datasheet

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MBM29F200TA-70PFTN

Manufacturer Part Number
MBM29F200TA-70PFTN
Description
CMOS 2M (256K x 8/128K x 16) FLASH MEMORY
Manufacturer
Fujitsu
Datasheet
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
2M ( 256K 8/128K 16 )
MBM29F200TA/MBM29F200BA
Embedded Erase
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard word-wide pinouts
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Low power consumption
• Low Vcc write inhibit
• Sector protection
• Temporary sector unprotection
• Erase Suspend/Resume
DISTINCTIVE CHARACTERISTICS
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
70 ns maximum access time
One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T=Top sector
B=Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically write and verifies data at specified address
20 mA typical active read current for Byte Mode
28 mA typical active read current for Word Mode
30 mA typical write/erase current
25 A typical standby current
Hardware method disables any combination of sectors from write or erase operations
Hardware method temporarily enable any combination of sectors from write or erase operations
Suspends the erase operation to allow a read in another sector within the same device
DATA SHEET
and Embedded Program
Algorithms
Algorithms
3.2 V
are trademarks of Advanced Micro Devices, Inc.
2
PROMs
DS05–20813–2E

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MBM29F200TA-70PFTN Summary of contents

Page 1

... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 2M ( 256K 8/128K 16 ) MBM29F200TA/MBM29F200BA DISTINCTIVE CHARACTERISTICS • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard word-wide pinouts 48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • ...

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... MBM29F200TA/200BA PACKAGE Marking side (FPT-48P-M19) 48-pin TSOP 2 Marking side (FPT-48P-M20) Marking side (FPT-44P-M16) 44-pin SOP ...

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... GENERAL DESCRIPTION The MBM29F200TA/ 2M-bit, 5.0 V-only Flash memory organized as 256K bytes of 8 bits each or 128K words of 16 bits each. The MBM29F200TA/BA is offered in a 48-pin TSOP and 44-pin SOP packages. This device is designed to be programmed in-system with the standard system 5 for write or erase operations. The device can also be reprogrammed in standard EPROM programmers. The MBM29F200TA/BA is erased when shipped from the factory ...

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... One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes • Individual-sector, multiple-sector, or bulk-erase capability • Individual or multiple-sector protection is user definable. 16K byte 8K byte 8K byte 32K byte 64K byte 64K byte 64K byte MBM29F200TA Sector Architecture 4 3FFFFh 64K byte 3BFFFh 64K byte 39FFFh 64K byte 37FFFh 32K byte ...

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... BLOCK DIAGRAM RY/BY Buffer State BYTE Control RESET Command Register Detector A-1 MBM29F200TA/200BA MBM29F200TA/BA – 70 — – RY/BY Erase Voltage Generator Program Voltage Chip Enable Generator Output Enable Logic Y-Decoder STB Address Timer Latch X-Decoder — ...

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... FPT-48P-M19 A 24 (Marking Side N.C. 17 N.C. 16 RY/BY 15 N.C. 14 MBM29F200TA/MBM29F200BA N.C. 13 Reverse Pinout RESET N. FPT-48P-M20 6 SOP (Top View) ...

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... LOGIC SYMBOL A RESET RY/BY BYTE MBM29F200TA/200BA Table 1 MBM29F200TA/BA Pin Configuration Pin Function A- Address Inputs Data Inputs/Outputs 0 15 Chip Enable CE Output Enable OE Write Enable WE Ready-Busy Output RY/BY Hardware Reset Pin/Sector Protection Unlock RESET ...

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... MBM29F200TA/200BA ORDERING INFORMATION Standard Products FJ standard products are available in several packages. The order number is formed by a combination of: MBM29F200 TA –70 PFTN DEVICE NUMBER/DESCRIPTION MBM29F200 2 Mega-bit (256K 5.0 V-only Read, Write, and Erase 8 PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP) Standard Pinout ...

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... Table 2 MBM29F200TA/BA User Bus Operations (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) Read (3) Standby Output Disable Write Enable Sector Protection (2) Verify Sector Protection (2) Temporary Sector Unprotection Reset (Hardware)/Standby Table 3 MBM29F200TA/BA User Bus Operations (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) ...

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... 51H and MBM29F200BA = 57H for x8 mode; MBM29F200TA = 2251H and MBM29F200BA = 2257H for x16 mode). All identifires for manufacturer and device will exhibit odd parity with DQ to read the proper device codes when executing the autoselect output from the device is disabled ...

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... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Protection The MBM29F200TA/BA features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 6). The sector protection feature is enabled using programming equipment at the user's site. The device is shipped with all sectors unprotected. ...

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... Temporary Sector Unprotection This feature allows temporary unprotection of previously protected sectors of the MBM29F200TA/BA device in order to change data. The Sector Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. ...

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... Table 5 Sector Address Tables (MBM29F200TA) Sector A16 A15 Address SA0 0 0 SA1 0 1 SA2 1 0 SA3 1 1 SA4 1 1 SA5 1 1 SA6 1 1 Table 6 Sector Address Tables (MBM29F200BA) Sector A16 A15 Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 ...

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... MBM29F200TA/200BA Table 7 MBM29F200TA/BA Command Definitions Bus First Bus Write Write Cycle Command Cycles Sequence Req'd Addr Word Read/Reset* 1 XXXH Byte Word 5555H Read/Reset* 3 Byte AAAAH Word 5555H Autoselect 3 Byte AAAAH Word 5555H Program 4 Byte AAAAH Word 5555H Chip Erase 6 Byte AAAAH ...

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... XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for x16 (XX02H for x8)returns the device code (MBM29F200TA = 51H and MBM29F200BA = 57H for x8 mode; MBM29F200TA = 2251H and MBM29F200BA = 2257H for x16 mode). (See Tables 4.1 and 4.2.) All manufacturer and device codes will exhibit odd parity with DQ Sector state (protection or unprotection) will be informed by address XX02H for x16 (XX04H for x8) ...

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... MBM29F200TA/200BA Chip Erase Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the “set- up” command. Two more “unlock” write cycles are then followed by the chip erase command. Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase Algorithm command sequence the device automatically will program and verify the entire memory for an all zero data pattern prior to electrical erase ...

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... DQ 7 Data Polling The MBM29F200TA/BA device features Data Polling as a method to indicate to the host that the Embedded Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the device will produce the complement of the data last written attempt to read the device will produce the true data last written attempt to read the device will produce a “ ...

Page 18

... DQ 6 Toggle Bit The MBM29F200TA/BA also features the “Toggle Bit” method to indicate to the host system that the Embed- ded Algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read ( OE toggling) data from the device will result in DQ toggling between one and zero ...

Page 19

... Byte/Word Configuration The BYTE pin selects the byte (8-bit) mode or word (16 bit) mode for the MBM29F200TA/BA device. When this pin is driven high, the device operates in the word (16 bit) mode. The data is read and programmed at DQ When this pin is driven low, the device operates in byte (8 bit) mode. Under this mode, the DQ ...

Page 20

... Data Protection The MBM29F200TA/BA is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completion of specific multi-bus cycle command sequences ...

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... OPERATING RANGES Commercial (C) Devices Ambient Temperature (T ) .......................................................... + Supply Voltages CC V for MBM29F200TA-70/BA-70 ...............................................+4. +5. for MBM29F200TA-12/BA-12 ...............................................+4. +5. Operating ranges define those limits between which the functionality of the device is guaranteed. MBM29F200TA/200BA , OE , RESET (Note 1) .........–2 +7 +2.0 V for periods ns. ...

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... MBM29F200TA/200BA MAXIMUM OVERSHOOT +0.8 V –0.5 V –2.0 V Figure 1 Maximum Negative Overshoot Waveform +2.0 V Figure 2 Maximum Positive Overshoot Waveform +13.5 V +13 +0 *:This waveform is applied for A Figure 3 Maximum Positive Overshoot Waveform OE, and RESET. ...

Page 23

... Lock-Out Voltage LKO CC Notes: 1. The I current listed includes both the DC operating current and the frequency dependent component (at 6 MHz). CC The frequency component typically is 2 mA/MHz active while Embedded Algorithm (program or erase progress. CC MBM29F200TA/200BA Test Conditions Max ...

Page 24

... MBM29F200TA/200BA DC CHARACTERISTICS (continued) • CMOS Compatible Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) ...

Page 25

... CE or BYTE switching low or high t ELFH Notes: 1. Test Conditions: Output Load: 1 TTL gate and 30 pF Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V MBM29F200TA/200BA –70 Test Setup (Note 1) Min Max Max ...

Page 26

... MBM29F200TA/200BA Device Under Test Note: For –70 including jig capacitance L For all others 100 pF including jig capacitance L • Write/Erase/Program Operations Alternate WE Controlled Writes Parameter Symbols JEDEC Standard t Write Cycle Time t AVAV WC t Address Setup Time t AVWL AS t Address Hold Time ...

Page 27

... RESET Pulse Width RP t BYTE Switching Low to Output High-Z FLQZ t Program/Erase Valid to RD/BY Delay BUSY Notes: 1. This does not include the preprogramming time. 2. These timings are for Sector Protection operations. MBM29F200TA/200BA Description –70 Min. Min. Min. Min. Min. Typ. Typ. Max. Min. ...

Page 28

... MBM29F200TA/200BA • Write/Erase/Program Operations Alternate CE Controlled Writes Parameter Symbols JEDEC Standard t Write Cycle Time t AVAV Address Setup Time AVEL Address Hold Time ELAX AH t Data Setup Time t DVEH DS t Data Hold Time t EHDX DH t Output Enable Setup Time OES ...

Page 29

... SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM Addresses OEH WE High-Z Outputs Figure 5 AC Waveforms for Read Operations MBM29F200TA/200BA INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from ...

Page 30

... MBM29F200TA/200BA 3rd Bus Cycle Addresses 5555H GHWL A0H Data t DS 5.0V Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. ...

Page 31

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. 6. These waveforms are for the 16 mode. Figure 7 Alternate CE Controlled Program Operation Timings MBM29F200TA/200BA Data Polling ...

Page 32

... MBM29F200TA/200BA Addresses 5555H CE t GHWL Data AAH VCS Notes the sector address for Sector Erase. Addresses = 5555H (Word), AAAAH (Byte) for Chip Erase. 2. These waveforms are for the x16 mode. The addresses differ from x8 mode. Figure 8 AC Waveforms Chip/Sector Erase Operations ...

Page 33

... CE t OEH WE t OES OE Data DQ = Toggle 6 ( *DQ stops toggling (The device has completed the Embedded operation). 6 Figure 10 AC Waveforms for Toggle Bit during Embedded Algorithm Operations MBM29F200TA/200BA Valid Data t WHWH1 =Invalid 0 6 Valid Data ...

Page 34

... MBM29F200TA/200BA CE WE RY/BY Figure 11 RY/BY Timing Diagram During Program/Erase Operations CE RY/BY RESET Figure 12 RESET/RY/BY Timing Diagram 34 The rising edge of the last WE signal Entire programming or erase operations t BUSY READY ...

Page 35

... CE OE BYTE t ELFL t ELFH /A–1 15 Figure 13 BYTE Timing Diagram for Read Operations CE WE BYTE Figure 14 BYTE Timing Diagram for Write Operations MBM29F200TA/200BA Data Output Data Output ( ( Address 15 Output Input t FLQZ The falling edge of the last WE signal ...

Page 36

... MBM29F200TA/200BA SAX 12V VLHT 12V VLHT WE t OESP t CSP CE Data SAX = Sector Address for initial sector SAY = Sector Address for next sector Figure 15 AC Waveforms for Sector Protection 36 t VLHT t WPP t OE SAY ...

Page 37

... RESET VLHT RY/BY Figure 16 Temporary Sector Unprotection MBM29F200TA/200BA Program or Erase Command Sequence ...

Page 38

... MBM29F200TA/200BA EMBEDDED ALGORITHMS Increment Address Program Command Sequence* (Address/Command The sequence is applied for x16 mode. The addresses differ from x8 mode. Figure 17 Embedded Programming Algorithm Table 9 Embedded Programming Algorithm Bus Operations Standby* Write Read Standby* *Device is either powered-down, erase inhibit or program inhibit. ...

Page 39

... Figure 18 Embedded Erase Algorithm Table 10 Embedded Erase Algorithm Bus Operations Command Sequence Standby* Write Read Standby* *Device is either powered-down, erase inhibit or program inhibit. MBM29F200TA/200BA Start Write Erase Command Sequence (See below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* ...

Page 40

... MBM29F200TA/200BA Note rechecked even Start VA = Address for programming Read Byte ( Addr = VA Yes DQ = Data Yes Read Byte ( Addr = VA Yes DQ = Data Fail Pass = “1” because DQ may change simultaneously with Figure 19 Data Polling Algorithm ...

Page 41

... DQ No (DQ DQ Note rechecked even changing to “1” . Figure 20 Toggle Bit Algorithm MBM29F200TA/200BA Start Read Byte VA = Address for programming Any of the sector addresses Addr = VA within the sector being erased during sector erase operation No = XXXXH during chip erase ...

Page 42

... MBM29F200TA/200BA Increment PLSCNT NO PLSCNT = 25? YES Remove V From Write Reset Command Device Failed Figure 21 Sector Protection Algorithm 42 Start Set Up Sector Addr ( PLSCNT = RESET = Activate WE Pulse Time out 100 ...

Page 43

... Start RESET = V (Note 1) Perform Erase or Program Operations RESET = V Temporary Sector Group Unprotect Completed (Note 2) NOTES: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 22 Temporary Sector Unprotection Algorithm MBM29F200TA/200BA ...

Page 44

... MBM29F200TA/200BA ERASE AND PROGRAMMING PERFORMANCE Parameter Min. Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle 100,000 TSOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions 1.0 MHz ...

Page 45

... Standard Thin Small Outline Package (measured in inches) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1994 FUJITSU LIMITED F48029S-1C-1 C MBM29F200TA/200BA +.010 –.008 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) "A" 22 +0.10 0(0)MIN –0.05 Ø0.13(.005 ...

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... MBM29F200TA/200BA 48-Pin Reversed Thin Small Outline Package (measured in inches) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1994 FUJITSU LIMITED F48030S-1C Details of "A" part 0.15(.006) MAX 0.35(.014) "A" MAX 0.15(.006) ...

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... Singapore 0718 Tel: 336-1600 Fax: 336-1609 P9603 FUJITSU LIMITED Printed in Japan MBM29F200TA/200BA All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Com- plete Information sufficient for construction purposes is not nec- essarily given. The information contained in this document has been carefully checked and is believed to be reliable ...

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