AT32UC3B0128 Atmel Corporation, AT32UC3B0128 Datasheet - Page 336

• Manufacturer Part Number: AT32UC3B0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.7.6
Name:
Access Type:
Offset:
Reset Value:
• MANERR: Manchester Error
• CTS: Image of CTS Input
• DCD: Image of DCD Input
• DSR: Image of DSR Input
• RI: Image of RI Input
• CTSIC: Clear to Send Input Change Flag
• DCDIC: Data Carrier Detect Input Change Flag
• DSRIC: Data Set Ready Input Change Flag
32059L–AVR32–01/2012
PARE
CTS
31
23
15
–
–
7
0: No Manchester error has been detected since the last RSTSTA.
1: At least one Manchester error has been detected since the last RSTSTA.
0: CTS is low.
1: CTS is high.
0: DCD is low.
1: DCD is high.
0: DSR is low.
1: DSR is high.
0: RI is low.
1: RI is high.
0: No change has been detected on the CTS pin since the last CSR read.
1: At least one change has been detected on the CTS pin since the last CSR read.
0: No change has been detected on the DCD pin since the last CSR read.
1: At least one change has been detected on the DCD pin since the last CSR read.
0: No change has been detected on the DSR pin since the last CSR read.
1: At least one change has been detected on the DSR pin since the last CSR read.
Channel Status Register
FRAME
DCD
30
22
14
CSR
Read-only
0x14
0x00000000
–
–
6
OVRE
NACK
DSR
29
21
13
–
5
RXBUFF
28
20
12
RI
–
4
–
CTSIC
27
19
11
–
–
3
–
ITER/UNRE
RXBRK
DCDIC
26
18
10
–
2
TXEMPTY
TXRDY
DSRIC
25
17
–
9
1
TIMEOUT
MANERR
RXRDY
RIIC
24
16
8
0
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