AT89LP51RB2 Atmel Corporation, AT89LP51RB2 Datasheet - Page 6

• Manufacturer Part Number: AT89LP51RB2
• Manufacturer: Atmel Corporation

Specifications of AT89LP51RB2

• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 42
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Adc Channels: 7
• Adc Resolution (bits): 10
• Adc Speed (ksps): 153.8
• Sram (kbytes): 1.375
• Self Program Memory: API
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 4
• Isp: SPI/OCD/UART
• Watchdog: Yes

The AT89LP51RB2/RC2/IC2 retains all of the standard features of the AT89C51RB2/RC2,
including: 64KB of In-System Programmable Flash program memory, 256 bytes of RAM, 1152
bytes of expanded RAM, up to 40 I/O lines, three 16-bit timer/counters, a Programmable Coun-
ter Array, a programmable hardware watchdog timer, a keyboard interface, a full-duplex
enhanced serial port, a serial peripheral interface (SPI), on-chip crystal oscillator, and a four-
level, ten-vector interrupt system. A block diagram is shown in
Figure
2-1.
®
In addition, the Atmel
AT89LP51RB2/RC2/IC2 provides a Two-Wire Interface (TWI) for up to
400KB/s serial transfer; a 10-bit, 8-channel Analog-to-Digital Converter (ADC) with temperature
sensor and digital-to-analog (DAC) mode; two analog comparators; and an 8MHz internal
oscillator.
Some standard features on the AT89LP51RB2/RC2/IC2 are enhanced with new modes or oper-
ations. Mode 0 of Timer 0 or Timer 1 acts as a variable 9–16 bit timer/counter and Mode 1 acts
as a 16-bit auto-reload timer/counter. In addition, each timer/counter may independently drive an
8-bit precision pulse width modulation output. Mode 0 (synchronous mode) of the serial port
allows flexibility in the phase/polarity relationship between clock and data.
The I/O ports of the AT89LP51RB2/RC2/IC2 can be independently configured in one of four
operating modes. In quasi-bidirectional mode, the ports operate as in the classic 8051. In input-
only mode, the ports are tristated. Push-pull output mode provides full CMOS drivers and open-
drain mode provides just a pull-down. Unlike other 8051s, this allows Port 0 to operate with on-
chip pull-ups if desired.
The AT89LP51RB2/RC2/IC2 includes an On-Chip Debug (OCD) interface that allows read-mod-
ify-write capabilities of the system state and program flow control, and programming of the
internal memories. The on-chip Flash may also be programmed through the UART-based boot-
loader or the SPI-based In-System programming interface (ISP).
The TWI and OCD features are not available on the PDIP package. The AT89LP51IC2 is also
not available in PDIP.
The features of the AT89LP51RB2/RC2/IC2 make it a powerful choice for applications that need
pulse width modulation, high speed I/O, and counting capabilities such as alarms, motor control,
corded phones, and smart card readers.
AT89LP51RB2/RC2/IC2 Summary
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