AT90USB1287 Atmel Corporation, AT90USB1287 Datasheet - Page 24

• Manufacturer Part Number: AT90USB1287
• Manufacturer: Atmel Corporation

Specifications of AT90USB1287

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 48
• Ext Interrupts: 16
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 10
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

5.3.2
5.3.3
5.3.4
24
AT90USB64/128
The EEPROM Address Register – EEARH and EEARL
The EEPROM Data Register – EEDR
The EEPROM Control Register – EECR
• Bits 15..12 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 11..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 4K
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 4096.
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in
is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00
unless the EEPROM is busy programming.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
15
–
EEAR7
7
R
R/W
0
X
7
MSB
R/W
0
7
–
R
0
14
–
EEAR6
6
R
R/W
0
X
6
R/W
0
6
–
R
0
13
–
EEAR5
5
R
R/W
0
X
5
R/W
0
5
EEPM1
R/W
X
12
–
EEAR4
4
R
R/W
0
X
4
R/W
0
4
EEPM0
R/W
X
11
EEAR11
EEAR3
3
R/W
R/W
X
X
3
R/W
0
3
EERIE
R/W
0
2
R/W
0
2
EEMPE
R/W
0
10
EEAR10
EEAR2
2
R/W
R/W
X
X
1
0
R/W
1
X
EEPE
R/W
9
EEAR9
EEAR1
1
R/W
R/W
X
X
0
LSB
R/W
0
0
EERE
R/W
0
8
EEAR8
EEAR0
0
R/W
R/W
X
X
Table
5-2. While EEPE
EEDR
EECR
EEARH
EEARL
7593K–AVR–11/09