ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 421

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ATxmega192A3U

Manufacturer Part Number
ATxmega192A3U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega192A3U

Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32.5.6.5
32.5.6.6
32.5.6.7
32.5.6.8
32.5.7
8331A–AVR–07/11
Instruction Set Summary
LDCS - Load Data from PDI Control and Status Register Space
STCS - Store Data to PDI Control and Status Register Space
KEY - Set Activation Key
REPEAT - Set Instruction Repeat Counter
address - and data access. Four different address/data sizes are supported; byte, word, 3 bytes,
and long (4 bytes). Multiple-bytes access is internally broken down to repeated single-byte
accesses, but it reduces the protocol overhead.
The LDCS instruction is used to load data from the PDI control and status registers into the
physical layer shift register for serial read out. The LDCS instruction supports only direct
addressing and single-byte access.
The STCS instruction is used to store data that are serially shifted into the physical layer shift
register to locations within the PDI control and status registers. The STCS instruction supports
only direct addressing and single-byte access.
The KEY instruction is used to communicate the activation key bytes required for activating the
NVM interfaces.
The REPEAT instruction is used to store count values that are serially shifted into the physical
layer shift register to the repeat counter register. The instruction that is loaded directly after the
REPEAT instruction operand(s) will be repeated a number of times according to the specified
repeat counter register value. Hence, the initial repeat counter value plus one gives the total
number of times the instruction will be executed. Setting the repeat counter register to zero
makes the following instruction run once without being repeated.
The REPEAT instruction cannot be repeated. The KEY instruction cannot be repeated, and will
override the current value of the repeat counter register.
The PDI instruction set summary is shown in
Figure 32-14 on page
Atmel AVR XMEGA AU
422.
421

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